mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-17 10:26:15 +00:00
Remove all the bogus volatile qualifiers from the structs definitions
and associated evil casts to discard them.
This commit is contained in:
parent
335ac29ccd
commit
e609b4d7db
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=113017
@ -2033,8 +2033,7 @@ fxp_init(void *xsc)
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cb_ias->cb_status = 0;
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cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL;
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cb_ias->link_addr = -1;
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bcopy(sc->arpcom.ac_enaddr,
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(void *)(uintptr_t)(volatile void *)cb_ias->macaddr,
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bcopy(sc->arpcom.ac_enaddr, cb_ias->macaddr,
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sizeof(sc->arpcom.ac_enaddr));
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/*
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@ -2388,8 +2387,7 @@ fxp_mc_addrs(struct fxp_softc *sc)
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break;
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}
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bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
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(void *)(uintptr_t)(volatile void *)
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&sc->mcsp->mc_addr[nmcasts][0], 6);
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&sc->mcsp->mc_addr[nmcasts][0], 6);
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nmcasts++;
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}
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}
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@ -111,112 +111,112 @@
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* Command block definitions
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*/
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struct fxp_cb_nop {
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volatile u_int16_t cb_status;
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volatile u_int16_t cb_command;
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volatile u_int32_t link_addr;
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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};
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struct fxp_cb_ias {
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volatile u_int16_t cb_status;
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volatile u_int16_t cb_command;
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volatile u_int32_t link_addr;
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volatile u_int8_t macaddr[6];
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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u_int8_t macaddr[6];
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};
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/* I hate bit-fields :-( */
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struct fxp_cb_config {
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volatile u_int16_t cb_status;
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volatile u_int16_t cb_command;
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volatile u_int32_t link_addr;
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volatile u_int byte_count:6,
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:2;
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volatile u_int rx_fifo_limit:4,
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tx_fifo_limit:3,
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:1;
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volatile u_int8_t adaptive_ifs;
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volatile u_int mwi_enable:1, /* 8,9 */
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type_enable:1, /* 8,9 */
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read_align_en:1, /* 8,9 */
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end_wr_on_cl:1, /* 8,9 */
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:4;
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volatile u_int rx_dma_bytecount:7,
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:1;
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volatile u_int tx_dma_bytecount:7,
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dma_mbce:1;
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volatile u_int late_scb:1, /* 7 */
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direct_dma_dis:1, /* 8,9 */
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tno_int_or_tco_en:1, /* 7,9 */
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ci_int:1,
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ext_txcb_dis:1, /* 8,9 */
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ext_stats_dis:1, /* 8,9 */
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keep_overrun_rx:1,
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save_bf:1;
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volatile u_int disc_short_rx:1,
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underrun_retry:2,
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:2,
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ext_rfa:1, /* 550 */
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two_frames:1, /* 8,9 */
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dyn_tbd:1; /* 8,9 */
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volatile u_int mediatype:1, /* 7 */
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:6,
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csma_dis:1; /* 8,9 */
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volatile u_int tcp_udp_cksum:1, /* 9 */
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:3,
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vlan_tco:1, /* 8,9 */
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link_wake_en:1, /* 8,9 */
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arp_wake_en:1, /* 8 */
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mc_wake_en:1; /* 8 */
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volatile u_int :3,
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nsai:1,
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preamble_length:2,
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loopback:2;
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volatile u_int linear_priority:3, /* 7 */
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:5;
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volatile u_int linear_pri_mode:1, /* 7 */
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:3,
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interfrm_spacing:4;
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volatile u_int :8;
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volatile u_int :8;
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volatile u_int promiscuous:1,
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bcast_disable:1,
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wait_after_win:1, /* 8,9 */
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:1,
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ignore_ul:1, /* 8,9 */
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crc16_en:1, /* 9 */
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:1,
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crscdt:1;
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volatile u_int fc_delay_lsb:8; /* 8,9 */
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volatile u_int fc_delay_msb:8; /* 8,9 */
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volatile u_int stripping:1,
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padding:1,
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rcv_crc_xfer:1,
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long_rx_en:1, /* 8,9 */
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pri_fc_thresh:3, /* 8,9 */
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:1;
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volatile u_int ia_wake_en:1, /* 8 */
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magic_pkt_dis:1, /* 8,9,!9ER */
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tx_fc_dis:1, /* 8,9 */
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rx_fc_restop:1, /* 8,9 */
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rx_fc_restart:1, /* 8,9 */
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fc_filter:1, /* 8,9 */
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force_fdx:1,
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fdx_pin_en:1;
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volatile u_int :5,
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pri_fc_loc:1, /* 8,9 */
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multi_ia:1,
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:1;
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volatile u_int :3,
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mc_all:1,
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:4;
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volatile u_int8_t gamla_rx:1; /* 550 */
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volatile u_int8_t pad[9]; /* 550 */
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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u_int byte_count:6,
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:2;
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u_int rx_fifo_limit:4,
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tx_fifo_limit:3,
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:1;
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u_int8_t adaptive_ifs;
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u_int mwi_enable:1, /* 8,9 */
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type_enable:1, /* 8,9 */
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read_align_en:1, /* 8,9 */
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end_wr_on_cl:1, /* 8,9 */
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:4;
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u_int rx_dma_bytecount:7,
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:1;
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u_int tx_dma_bytecount:7,
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dma_mbce:1;
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u_int late_scb:1, /* 7 */
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direct_dma_dis:1, /* 8,9 */
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tno_int_or_tco_en:1, /* 7,9 */
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ci_int:1,
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ext_txcb_dis:1, /* 8,9 */
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ext_stats_dis:1, /* 8,9 */
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keep_overrun_rx:1,
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save_bf:1;
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u_int disc_short_rx:1,
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underrun_retry:2,
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:2,
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ext_rfa:1, /* 550 */
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two_frames:1, /* 8,9 */
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dyn_tbd:1; /* 8,9 */
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u_int mediatype:1, /* 7 */
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:6,
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csma_dis:1; /* 8,9 */
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u_int tcp_udp_cksum:1, /* 9 */
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:3,
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vlan_tco:1, /* 8,9 */
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link_wake_en:1, /* 8,9 */
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arp_wake_en:1, /* 8 */
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mc_wake_en:1; /* 8 */
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u_int :3,
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nsai:1,
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preamble_length:2,
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loopback:2;
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u_int linear_priority:3, /* 7 */
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:5;
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u_int linear_pri_mode:1, /* 7 */
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:3,
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interfrm_spacing:4;
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u_int :8;
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u_int :8;
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u_int promiscuous:1,
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bcast_disable:1,
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wait_after_win:1, /* 8,9 */
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:1,
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ignore_ul:1, /* 8,9 */
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crc16_en:1, /* 9 */
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:1,
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crscdt:1;
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u_int fc_delay_lsb:8; /* 8,9 */
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u_int fc_delay_msb:8; /* 8,9 */
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u_int stripping:1,
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padding:1,
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rcv_crc_xfer:1,
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long_rx_en:1, /* 8,9 */
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pri_fc_thresh:3, /* 8,9 */
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:1;
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u_int ia_wake_en:1, /* 8 */
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magic_pkt_dis:1, /* 8,9,!9ER */
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tx_fc_dis:1, /* 8,9 */
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rx_fc_restop:1, /* 8,9 */
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rx_fc_restart:1, /* 8,9 */
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fc_filter:1, /* 8,9 */
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force_fdx:1,
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fdx_pin_en:1;
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u_int :5,
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pri_fc_loc:1, /* 8,9 */
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multi_ia:1,
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:1;
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u_int :3,
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mc_all:1,
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:4;
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u_int8_t gamla_rx:1; /* 550 */
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u_int8_t pad[9]; /* 550 */
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};
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#define MAXMCADDR 80
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struct fxp_cb_mcs {
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volatile u_int16_t cb_status;
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volatile u_int16_t cb_command;
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volatile u_int32_t link_addr;
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volatile u_int16_t mc_cnt;
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volatile u_int8_t mc_addr[MAXMCADDR][6];
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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u_int16_t mc_cnt;
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u_int8_t mc_addr[MAXMCADDR][6];
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};
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#define MAXUCODESIZE 192
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@ -233,8 +233,8 @@ struct fxp_cb_ucode {
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#define FXP_NTXSEG 32
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struct fxp_tbd {
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volatile u_int32_t tb_addr;
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volatile u_int32_t tb_size;
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u_int32_t tb_addr;
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u_int32_t tb_size;
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};
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struct fxp_ipcb {
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@ -249,22 +249,22 @@ struct fxp_ipcb {
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* in the TBD array (see note below). This means we only
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* have to define 8 extra bytes here.
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*/
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volatile u_int16_t ipcb_schedule_low;
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volatile u_int8_t ipcb_ip_schedule;
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volatile u_int8_t ipcb_ip_activation_high;
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volatile u_int16_t ipcb_vlan_id;
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volatile u_int8_t ipcb_ip_header_offset;
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volatile u_int8_t ipcb_tcp_header_offset;
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u_int16_t ipcb_schedule_low;
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u_int8_t ipcb_ip_schedule;
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u_int8_t ipcb_ip_activation_high;
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u_int16_t ipcb_vlan_id;
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u_int8_t ipcb_ip_header_offset;
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u_int8_t ipcb_tcp_header_offset;
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};
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struct fxp_cb_tx {
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volatile u_int16_t cb_status;
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volatile u_int16_t cb_command;
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volatile u_int32_t link_addr;
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volatile u_int32_t tbd_array_addr;
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volatile u_int16_t byte_count;
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volatile u_int8_t tx_threshold;
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volatile u_int8_t tbd_number;
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u_int16_t cb_status;
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u_int16_t cb_command;
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u_int32_t link_addr;
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u_int32_t tbd_array_addr;
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u_int16_t byte_count;
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u_int8_t tx_threshold;
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u_int8_t tbd_number;
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/*
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* The following structure isn't actually part of the TxCB,
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@ -273,8 +273,8 @@ struct fxp_cb_tx {
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* fetched along with the TxCB.
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*/
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union {
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volatile struct fxp_ipcb;
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volatile struct fxp_tbd tbd[FXP_NTXSEG];
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struct fxp_ipcb;
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struct fxp_tbd tbd[FXP_NTXSEG];
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} tx_cb_u;
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};
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@ -326,24 +326,24 @@ struct fxp_cb_tx {
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*/
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struct fxp_rfa {
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volatile u_int16_t rfa_status;
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volatile u_int16_t rfa_control;
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volatile u_int8_t link_addr[4];
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volatile u_int8_t rbd_addr[4];
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volatile u_int16_t actual_size;
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volatile u_int16_t size;
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u_int16_t rfa_status;
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u_int16_t rfa_control;
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u_int32_t link_addr;
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u_int32_t rbd_addr;
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u_int16_t actual_size;
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u_int16_t size;
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/*
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* The following fields are only available when using
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* extended receive mode on an 82550/82551 chipset.
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*/
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volatile u_int16_t rfax_vlan_id;
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volatile u_int8_t rfax_rx_parser_sts;
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volatile u_int8_t rfax_rsvd0;
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volatile u_int16_t rfax_security_sts;
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volatile u_int8_t rfax_csum_sts;
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volatile u_int8_t rfax_zerocopy_sts;
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volatile u_int8_t rfax_pad[8];
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u_int16_t rfax_vlan_id;
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u_int8_t rfax_rx_parser_sts;
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u_int8_t rfax_rsvd0;
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u_int16_t rfax_security_sts;
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u_int8_t rfax_csum_sts;
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u_int8_t rfax_zerocopy_sts;
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u_int8_t rfax_pad[8];
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};
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#define FXP_RFAX_LEN 16
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@ -382,23 +382,23 @@ struct fxp_rfa {
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* Statistics dump area definitions
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*/
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struct fxp_stats {
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volatile u_int32_t tx_good;
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volatile u_int32_t tx_maxcols;
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volatile u_int32_t tx_latecols;
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volatile u_int32_t tx_underruns;
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volatile u_int32_t tx_lostcrs;
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volatile u_int32_t tx_deffered;
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volatile u_int32_t tx_single_collisions;
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volatile u_int32_t tx_multiple_collisions;
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volatile u_int32_t tx_total_collisions;
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volatile u_int32_t rx_good;
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volatile u_int32_t rx_crc_errors;
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volatile u_int32_t rx_alignment_errors;
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volatile u_int32_t rx_rnr_errors;
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volatile u_int32_t rx_overrun_errors;
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volatile u_int32_t rx_cdt_errors;
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volatile u_int32_t rx_shortframes;
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volatile u_int32_t completion_status;
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u_int32_t tx_good;
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u_int32_t tx_maxcols;
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u_int32_t tx_latecols;
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u_int32_t tx_underruns;
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u_int32_t tx_lostcrs;
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u_int32_t tx_deffered;
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u_int32_t tx_single_collisions;
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u_int32_t tx_multiple_collisions;
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u_int32_t tx_total_collisions;
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u_int32_t rx_good;
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u_int32_t rx_crc_errors;
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u_int32_t rx_alignment_errors;
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u_int32_t rx_rnr_errors;
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u_int32_t rx_overrun_errors;
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u_int32_t rx_cdt_errors;
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u_int32_t rx_shortframes;
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u_int32_t completion_status;
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};
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#define FXP_STATS_DUMP_COMPLETE 0xa005
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#define FXP_STATS_DR_COMPLETE 0xa007
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