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Replace the tulip_delay_300ns() with a DELAY(1). Hammering the PCI bus
to achieve a delay is pretty mean. Andrew reports: "The tulip_delay_300ns() is, well, bloody stupid on machines with a heavily loaded PCI bus. It tries to do a delay by assuming PCI reads will take a certain amount of time & issues a large amount of (expensive, 5% CPU when your PCI bus is heavily loaded) pci reads. Locally, we've replaced the calls to tulip_delay_300ns(sc) in the EMIT macros with a simple DELAY(1) and not seen any problems. Plus we've gained about 50Mb/sec throughput on our gigabit network cards because of the added PCI bus bandwidth available." Also, I do not understand why, but this change appears to stop the Transmit Fifo underrun on one of my systems (but not the Alpha PC164SX). This shouldn't make that much of a difference since the mii bus isn't touched all that often, but perhaps when it does get accessed and hence hammers the register, it was causing the chip to get upset. Submitted by: Andrew Gallatin <gallatin@cs.duke.edu>
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=50055
@ -1820,16 +1820,7 @@ static const tulip_boardsw_t tulip_2114x_isv_boardsw = {
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/*
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* Code the read the SROM and MII bit streams (I2C)
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*/
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static void
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tulip_delay_300ns(
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tulip_softc_t * const sc)
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{
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int idx;
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for (idx = (300 / 33) + 1; idx > 0; idx--)
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(void) TULIP_CSR_READ(sc, csr_busmode);
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}
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#define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); tulip_delay_300ns(sc); } while (0)
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#define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0)
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static void
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tulip_srom_idle(
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@ -1902,7 +1893,7 @@ tulip_srom_read(
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tulip_srom_idle(sc);
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}
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#define MII_EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); tulip_delay_300ns(sc); } while (0)
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#define MII_EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0)
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static void
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tulip_mii_writebits(
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@ -1820,16 +1820,7 @@ static const tulip_boardsw_t tulip_2114x_isv_boardsw = {
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/*
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* Code the read the SROM and MII bit streams (I2C)
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*/
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static void
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tulip_delay_300ns(
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tulip_softc_t * const sc)
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{
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int idx;
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for (idx = (300 / 33) + 1; idx > 0; idx--)
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(void) TULIP_CSR_READ(sc, csr_busmode);
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}
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#define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); tulip_delay_300ns(sc); } while (0)
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#define EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0)
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static void
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tulip_srom_idle(
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@ -1902,7 +1893,7 @@ tulip_srom_read(
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tulip_srom_idle(sc);
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}
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#define MII_EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); tulip_delay_300ns(sc); } while (0)
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#define MII_EMIT do { TULIP_CSR_WRITE(sc, csr_srom_mii, csr); DELAY(1); } while (0)
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static void
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tulip_mii_writebits(
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