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Properly parse 40G media types from newer Mellanox adapters that are
40G capable. For now, map all 40G links to 40GBase-CR4. MFC after: 2 weeks
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parent
19a3210a66
commit
efbebba22a
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=234099
@ -991,12 +991,20 @@ static int mlx4_en_calc_media(struct mlx4_en_priv *priv)
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active |= IFM_FDX;
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trans_type = priv->port_state.transciver;
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/* XXX I don't know all of the transceiver values. */
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if (priv->port_state.link_speed == 1000)
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switch (priv->port_state.link_speed) {
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case 1000:
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active |= IFM_1000_T;
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else if (trans_type > 0 && trans_type <= 0xC)
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break;
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case 10000:
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if (trans_type > 0 && trans_type <= 0xC)
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active |= IFM_10G_SR;
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else if (trans_type == 0x80 || trans_type == 0)
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active |= IFM_10G_CX4;
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break;
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case 40000:
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active |= IFM_40G_CR4;
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break;
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}
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if (priv->prof->tx_pause)
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active |= IFM_ETH_TXPAUSE;
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if (priv->prof->rx_pause)
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@ -152,11 +152,21 @@ int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
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/* This command is always accessed from Ethtool context
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* already synchronized, no need in locking */
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state->link_state = !!(qport_context->link_up & MLX4_EN_LINK_UP_MASK);
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if ((qport_context->link_speed & MLX4_EN_SPEED_MASK) ==
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MLX4_EN_1G_SPEED)
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switch (qport_context->link_speed & MLX4_EN_SPEED_MASK) {
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case MLX4_EN_1G_SPEED:
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state->link_speed = 1000;
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else
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break;
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case MLX4_EN_10G_SPEED_XAUI:
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case MLX4_EN_10G_SPEED_XFI:
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state->link_speed = 10000;
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break;
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case MLX4_EN_40G_SPEED:
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state->link_speed = 40000;
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break;
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default:
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state->link_speed = -1;
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break;
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}
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state->transciver = qport_context->transceiver;
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if (be32_to_cpu(qport_context->transceiver_code_hi) & 0x400)
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state->transciver = 0x80;
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@ -85,6 +85,14 @@ enum {
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MLX4_MCAST_ENABLE = 2,
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};
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enum {
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MLX4_EN_1G_SPEED = 0x02,
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MLX4_EN_10G_SPEED_XFI = 0x01,
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MLX4_EN_10G_SPEED_XAUI = 0x00,
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MLX4_EN_40G_SPEED = 0x40,
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MLX4_EN_OTHER_SPEED = 0x0f,
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};
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struct mlx4_en_query_port_context {
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u8 link_up;
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#define MLX4_EN_LINK_UP_MASK 0x80
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@ -92,8 +100,7 @@ struct mlx4_en_query_port_context {
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__be16 mtu;
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u8 reserved2;
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u8 link_speed;
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#define MLX4_EN_SPEED_MASK 0x3
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#define MLX4_EN_1G_SPEED 0x2
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#define MLX4_EN_SPEED_MASK 0x43
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u16 reserved3[5];
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__be64 mac;
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u8 transceiver;
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