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- Move ofw_pci_alloc_busno() to the ofw_pci KOBJ interface,
allowing the driver for the host-PCI-bridge to indicate that
reenumeration of the PCI busses isn't supported by returning
-1 instead of a valid PCI bus number. This is needed in order
support both Tomatillo, which don't support reenumeration and
thus are apparently intended to be used for independently
numbered PCI domains only, and Psycho bridges, whose busses
need to be reenumerated on at least some E450, without the
#ifndef currently used for sun4v in order to support multiple
independently PCI domains. The actual allocation/incrementation
of the PCI bus numbers is now done in psycho(4), though it
no longer establish a mapping between bus numbers and device
nodes like ofw_pci_alloc_busno() did as that functionality
wasn't used (but can easily brought back if really needed).
The now no longer used sys/sparc64/pci/ofw_pci.c is also
removed from sys/conf/files.sun4v as ofw_pci_alloc_busno()
wasn't used there in the first place.
- In ofw_pci_default_{adjust_busrange,intr_pending}() sanity
check that the device has a parent before passing it on.
- Make psycho_softcs static to sys/sparc64/pci/psycho.c as
it's not used outside of that module.
- In sys/sparc64/pci/ofw_pcib_subr.c remove the superfluous
inclusion of opt_global.h and correct the debug output for
adjusting the subordinate bus number.
This commit is contained in:
Marius Strobl
parent
9030c513c8
commit
f0d8df7bb2
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=170930
@ -81,7 +81,6 @@ sparc64/isa/isa.c optional isa
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sparc64/isa/isa_dma.c optional isa
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sparc64/isa/ofw_isa.c optional ebus | isa
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sparc64/pci/apb.c optional pci
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sparc64/pci/ofw_pci.c optional pci
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sparc64/pci/ofw_pcib.c optional pci
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sparc64/pci/ofw_pcib_subr.c optional pci
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sparc64/pci/ofw_pcibus.c optional pci
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@ -47,7 +47,6 @@ sun4v/sun4v/exception.S standard no-obj
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sparc64/sparc64/gdb_machdep.c optional gdb
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sun4v/sun4v/hv_pci.c optional pci
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sun4v/sun4v/trap_trace.S optional trap_tracing
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sparc64/pci/ofw_pci.c optional pci
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sparc64/pci/ofw_pcib.c optional pci
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sparc64/pci/ofw_pcib_subr.c optional pci
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sparc64/pci/ofw_pcibus.c optional pci
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@ -1,76 +0,0 @@
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/*-
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* Copyright (c) 1999, 2000 Matthew R. Green
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* Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: psycho.c,v 1.35 2001/09/10 16:17:06 eeh Exp
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ofw_pci.h"
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <sparc64/pci/ofw_pci.h>
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static uint8_t pci_bus_cnt;
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static phandle_t *pci_bus_map;
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static int pci_bus_map_sz;
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#define PCI_BUS_MAP_INC 10
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uint8_t
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ofw_pci_alloc_busno(phandle_t node)
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{
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phandle_t *om;
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int osz;
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uint8_t n;
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n = pci_bus_cnt++;
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/* Establish a mapping between bus numbers and device nodes. */
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if (n >= pci_bus_map_sz) {
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osz = pci_bus_map_sz;
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om = pci_bus_map;
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pci_bus_map_sz = n + PCI_BUS_MAP_INC;
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pci_bus_map = malloc(sizeof(*pci_bus_map) * pci_bus_map_sz,
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M_DEVBUF, M_WAITOK | M_ZERO);
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if (om != NULL) {
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bcopy(om, pci_bus_map, sizeof(*om) * osz);
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free(om, M_DEVBUF);
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}
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}
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pci_bus_map[n] = node;
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return (n);
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}
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@ -64,6 +64,4 @@ struct ofw_pci_ranges {
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(((uint64_t)(r)->size_hi << 32) | (uint64_t)(r)->size_lo)
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#define OFW_PCI_RANGE_CS(r) (((r)->cspace >> 24) & 0x03)
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uint8_t ofw_pci_alloc_busno(phandle_t);
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#endif /* ! _SPARC64_PCI_OFW_PCI_H_ */
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@ -34,20 +34,35 @@ INTERFACE ofw_pci;
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CODE {
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static ofw_pci_intr_pending_t ofw_pci_default_intr_pending;
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static ofw_pci_alloc_busno_t ofw_pci_default_alloc_busno;
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static ofw_pci_adjust_busrange_t ofw_pci_default_adjust_busrange;
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static int
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ofw_pci_default_intr_pending(device_t dev, ofw_pci_intr_t intr)
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{
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return (OFW_PCI_INTR_PENDING(device_get_parent(dev), intr));
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if (device_get_parent(dev) != NULL)
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return (OFW_PCI_INTR_PENDING(device_get_parent(dev),
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intr));
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return (0);
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}
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static int
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ofw_pci_default_alloc_busno(device_t dev)
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{
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if (device_get_parent(dev) != NULL)
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return (OFW_PCI_ALLOC_BUSNO(device_get_parent(dev)));
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return (-1);
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}
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static void
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ofw_pci_default_adjust_busrange(device_t dev, u_int busno)
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{
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return (OFW_PCI_ADJUST_BUSRANGE(device_get_parent(dev), busno));
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if (device_get_parent(dev) != NULL)
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return (OFW_PCI_ADJUST_BUSRANGE(device_get_parent(dev),
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busno));
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}
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};
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@ -57,8 +72,15 @@ METHOD int intr_pending {
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ofw_pci_intr_t intr;
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} DEFAULT ofw_pci_default_intr_pending;
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# Make sure that all PCI bridges up in the hierarchy contain this bus in their
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# subordinate bus range. This is required because we reenumerate all PCI
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# Allocate a bus number for reenumerating a PCI bus. A return value of -1
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# means that reenumeration is generally not supported, otherwise all PCI
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# busses must be reenumerated using bus numbers obtained via this method.
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METHOD int alloc_busno {
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device_t dev;
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} DEFAULT ofw_pci_default_alloc_busno;
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# Make sure that all PCI bridges up in the hierarchy contain this bus in
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# their subordinate bus range. This is required when reenumerating the PCI
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# buses.
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METHOD void adjust_busrange {
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device_t dev;
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@ -27,7 +27,6 @@
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__FBSDID("$FreeBSD$");
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#include "opt_ofw_pci.h"
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#include "opt_global.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -54,7 +53,7 @@ ofw_pcib_gen_setup(device_t bridge)
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{
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struct ofw_pcib_gen_softc *sc;
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#ifndef SUN4V
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u_int secbus;
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int secbus;
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#endif
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sc = device_get_softc(bridge);
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@ -64,18 +63,20 @@ ofw_pcib_gen_setup(device_t bridge)
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("ofw_pcib_gen_setup: no ofw pci parent bus!"));
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/*
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* Setup the secondary bus number register, by allocating a new unique
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* bus number for it; the firmware preset does not always seem to be
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* correct.
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* Setup the secondary bus number register, if supported, by
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* allocating a new unique bus number for it; the firmware
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* preset does not always seem to be correct in that case.
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*/
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#ifndef SUN4V
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secbus = ofw_pci_alloc_busno(sc->ops_node);
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pci_write_config(bridge, PCIR_PRIBUS_1, pci_get_bus(bridge), 1);
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pci_write_config(bridge, PCIR_SECBUS_1, secbus, 1);
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pci_write_config(bridge, PCIR_SUBBUS_1, secbus, 1);
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sc->ops_pcib_sc.subbus = sc->ops_pcib_sc.secbus = secbus;
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/* Notify parent bridges. */
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OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), secbus);
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secbus = OFW_PCI_ALLOC_BUSNO(bridge);
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if (secbus != -1) {
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pci_write_config(bridge, PCIR_PRIBUS_1, pci_get_bus(bridge), 1);
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pci_write_config(bridge, PCIR_SECBUS_1, secbus, 1);
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pci_write_config(bridge, PCIR_SUBBUS_1, secbus, 1);
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sc->ops_pcib_sc.subbus = sc->ops_pcib_sc.secbus = secbus;
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/* Notify parent bridges. */
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OFW_PCI_ADJUST_BUSRANGE(device_get_parent(bridge), secbus);
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}
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#endif
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ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo,
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@ -135,7 +136,7 @@ ofw_pcib_gen_adjust_busrange(device_t bridge, u_int subbus)
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if (subbus > sc->ops_pcib_sc.subbus) {
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#ifdef OFW_PCI_DEBUG
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device_printf(bridge,
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"adjusting secondary bus number from %d to %d\n",
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"adjusting subordinate bus number from %d to %d\n",
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sc->ops_pcib_sc.subbus, subbus);
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#endif
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pci_write_config(bridge, PCIR_SUBBUS_1, subbus, 1);
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@ -120,6 +120,7 @@ static pcib_write_config_t psycho_write_config;
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static pcib_route_interrupt_t psycho_route_interrupt;
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static ofw_pci_intr_pending_t psycho_intr_pending;
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static ofw_bus_get_node_t psycho_get_node;
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static ofw_pci_alloc_busno_t psycho_alloc_busno;
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static ofw_pci_adjust_busrange_t psycho_adjust_busrange;
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static device_method_t psycho_methods[] = {
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@ -152,6 +153,7 @@ static device_method_t psycho_methods[] = {
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/* ofw_pci interface */
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DEVMETHOD(ofw_pci_intr_pending, psycho_intr_pending),
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DEVMETHOD(ofw_pci_alloc_busno, psycho_alloc_busno),
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DEVMETHOD(ofw_pci_adjust_busrange, psycho_adjust_busrange),
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{ 0, 0 }
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@ -167,9 +169,11 @@ static devclass_t psycho_devclass;
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DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0);
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SLIST_HEAD(, psycho_softc) psycho_softcs =
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static SLIST_HEAD(, psycho_softc) psycho_softcs =
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SLIST_HEAD_INITIALIZER(psycho_softcs);
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static uint8_t psycho_pci_bus_cnt;
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struct psycho_clr {
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struct psycho_softc *pci_sc;
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bus_addr_t pci_clr; /* clear register */
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@ -629,7 +633,7 @@ psycho_attach(device_t dev)
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PCIB_WRITE_CONFIG(dev, psycho_br[0], PCS_DEVICE, PCS_FUNC,
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PCIR_LATTIMER, 64, 1);
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sc->sc_pci_secbus = sc->sc_pci_subbus = ofw_pci_alloc_busno(node);
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sc->sc_pci_secbus = sc->sc_pci_subbus = psycho_alloc_busno(dev);
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/*
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* Program the bus range registers.
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* NOTE: for the Psycho, the second write changes the bus number the
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@ -1306,6 +1310,15 @@ psycho_get_node(device_t bus, device_t dev)
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return (sc->sc_node);
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}
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static int
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psycho_alloc_busno(device_t dev)
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{
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if (psycho_pci_bus_cnt == PCI_BUSMAX)
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panic("%s: out of PCI bus numbers", __func__);
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return (psycho_pci_bus_cnt++);
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}
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static void
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psycho_adjust_busrange(device_t dev, u_int subbus)
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{
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