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Bring over the AR5416 per-rate TX power code, modified to use the
AR9287 EEPROM layout. The AR9287 only supports 2ghz, so I've removed the 5ghz code (but left the 5ghz edge flags in there for now) and hard-coded the 2ghz-only path. Whilst I'm there, fix a typo (ar9285->ar9287.) This meets basic TX throughput testing - iperf TX tests == 27-28mbit in 11g, matching the rest of my 11g kit.
This commit is contained in:
Adrian Chadd
parent
ea18ed263e
commit
f1285519e2
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=222312
@ -111,30 +111,220 @@ ar9287SetPowerCalTable(struct ath_hal *ah,
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*pTxPowerIndexOffset = 0;
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}
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/* XXX hard-coded values? */
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#define REDUCE_SCALED_POWER_BY_TWO_CHAIN 6
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#define REDUCE_SCALED_POWER_BY_THREE_CHAIN 10
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/*
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* Fetch the maximum TX power per rate.
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* ar9287SetPowerPerRateTable
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*
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* For now, this is hard-coded at 5dBm until this code has been ported
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* from Atheros/ath9k and tested.
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* Sets the transmit power in the baseband for the given
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* operating channel and mode.
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*
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* This is like the v14 EEPROM table except the 5GHz code.
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*/
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static HAL_BOOL
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ar9285SetPowerPerRateTable(struct ath_hal *ah,
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ar9287SetPowerPerRateTable(struct ath_hal *ah,
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struct ar9287_eeprom *pEepData,
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const struct ieee80211_channel *chan,
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int16_t *ratesArray, uint16_t cfgCtl,
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uint16_t AntennaReduction,
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uint16_t AntennaReduction,
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uint16_t twiceMaxRegulatoryPower,
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uint16_t powerLimit)
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{
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#define N(a) (sizeof(a)/sizeof(a[0]))
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/* Local defines to distinguish between extension and control CTL's */
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#define EXT_ADDITIVE (0x8000)
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#define CTL_11A_EXT (CTL_11A | EXT_ADDITIVE)
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#define CTL_11G_EXT (CTL_11G | EXT_ADDITIVE)
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#define CTL_11B_EXT (CTL_11B | EXT_ADDITIVE)
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uint16_t twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
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int i;
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int16_t twiceLargestAntenna;
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struct cal_ctl_data_ar9287 *rep;
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CAL_TARGET_POWER_LEG targetPowerOfdm;
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CAL_TARGET_POWER_LEG targetPowerCck = {0, {0, 0, 0, 0}};
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CAL_TARGET_POWER_LEG targetPowerOfdmExt = {0, {0, 0, 0, 0}};
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CAL_TARGET_POWER_LEG targetPowerCckExt = {0, {0, 0, 0, 0}};
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CAL_TARGET_POWER_HT targetPowerHt20;
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CAL_TARGET_POWER_HT targetPowerHt40 = {0, {0, 0, 0, 0}};
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int16_t scaledPower, minCtlPower;
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/* For now, set all tx power rates to 5 dBm */
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for (i = 0; i < Ar5416RateSize; i++)
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ratesArray[i] = 10;
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#define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */
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static const uint16_t ctlModesFor11g[] = {
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CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
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};
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const uint16_t *pCtlMode;
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uint16_t numCtlModes, ctlMode, freq;
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CHAN_CENTERS centers;
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ar5416GetChannelCenters(ah, chan, ¢ers);
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/* Compute TxPower reduction due to Antenna Gain */
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twiceLargestAntenna = AH_MAX(
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pEepData->modalHeader.antennaGainCh[0],
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pEepData->modalHeader.antennaGainCh[1]);
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twiceLargestAntenna = (int16_t)AH_MIN((AntennaReduction) - twiceLargestAntenna, 0);
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/* XXX setup for 5212 use (really used?) */
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ath_hal_eepromSet(ah, AR_EEP_ANTGAINMAX_2, twiceLargestAntenna);
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/*
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* scaledPower is the minimum of the user input power level and
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* the regulatory allowed power level
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*/
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scaledPower = AH_MIN(powerLimit, twiceMaxRegulatoryPower + twiceLargestAntenna);
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/* Reduce scaled Power by number of chains active to get to per chain tx power level */
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/* TODO: better value than these? */
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switch (owl_get_ntxchains(AH5416(ah)->ah_tx_chainmask)) {
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case 1:
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break;
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case 2:
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scaledPower -= REDUCE_SCALED_POWER_BY_TWO_CHAIN;
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break;
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case 3:
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scaledPower -= REDUCE_SCALED_POWER_BY_THREE_CHAIN;
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break;
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default:
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return AH_FALSE; /* Unsupported number of chains */
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}
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scaledPower = AH_MAX(0, scaledPower);
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/* Get target powers from EEPROM - our baseline for TX Power */
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/* XXX assume channel is 2ghz */
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if (1) {
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/* Setup for CTL modes */
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numCtlModes = N(ctlModesFor11g) - SUB_NUM_CTL_MODES_AT_2G_40; /* CTL_11B, CTL_11G, CTL_2GHT20 */
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pCtlMode = ctlModesFor11g;
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ar5416GetTargetPowersLeg(ah, chan, pEepData->calTargetPowerCck,
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AR9287_NUM_2G_CCK_TARGET_POWERS, &targetPowerCck, 4, AH_FALSE);
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ar5416GetTargetPowersLeg(ah, chan, pEepData->calTargetPower2G,
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AR9287_NUM_2G_20_TARGET_POWERS, &targetPowerOfdm, 4, AH_FALSE);
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ar5416GetTargetPowers(ah, chan, pEepData->calTargetPower2GHT20,
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AR9287_NUM_2G_20_TARGET_POWERS, &targetPowerHt20, 8, AH_FALSE);
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if (IEEE80211_IS_CHAN_HT40(chan)) {
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numCtlModes = N(ctlModesFor11g); /* All 2G CTL's */
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ar5416GetTargetPowers(ah, chan, pEepData->calTargetPower2GHT40,
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AR9287_NUM_2G_40_TARGET_POWERS, &targetPowerHt40, 8, AH_TRUE);
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/* Get target powers for extension channels */
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ar5416GetTargetPowersLeg(ah, chan, pEepData->calTargetPowerCck,
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AR9287_NUM_2G_CCK_TARGET_POWERS, &targetPowerCckExt, 4, AH_TRUE);
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ar5416GetTargetPowersLeg(ah, chan, pEepData->calTargetPower2G,
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AR9287_NUM_2G_20_TARGET_POWERS, &targetPowerOfdmExt, 4, AH_TRUE);
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}
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}
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/*
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* For MIMO, need to apply regulatory caps individually across dynamically
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* running modes: CCK, OFDM, HT20, HT40
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*
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* The outer loop walks through each possible applicable runtime mode.
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* The inner loop walks through each ctlIndex entry in EEPROM.
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* The ctl value is encoded as [7:4] == test group, [3:0] == test mode.
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*
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*/
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for (ctlMode = 0; ctlMode < numCtlModes; ctlMode++) {
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HAL_BOOL isHt40CtlMode = (pCtlMode[ctlMode] == CTL_5GHT40) ||
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(pCtlMode[ctlMode] == CTL_2GHT40);
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if (isHt40CtlMode) {
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freq = centers.ctl_center;
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} else if (pCtlMode[ctlMode] & EXT_ADDITIVE) {
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freq = centers.ext_center;
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} else {
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freq = centers.ctl_center;
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}
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/* walk through each CTL index stored in EEPROM */
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for (i = 0; (i < AR9287_NUM_CTLS) && pEepData->ctlIndex[i]; i++) {
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uint16_t twiceMinEdgePower;
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/* compare test group from regulatory channel list with test mode from pCtlMode list */
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if ((((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) == pEepData->ctlIndex[i]) ||
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(((cfgCtl & ~CTL_MODE_M) | (pCtlMode[ctlMode] & CTL_MODE_M)) ==
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((pEepData->ctlIndex[i] & CTL_MODE_M) | SD_NO_CTL))) {
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rep = &(pEepData->ctlData[i]);
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twiceMinEdgePower = ar5416GetMaxEdgePower(freq,
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rep->ctlEdges[owl_get_ntxchains(AH5416(ah)->ah_tx_chainmask) - 1],
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IEEE80211_IS_CHAN_2GHZ(chan));
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if ((cfgCtl & ~CTL_MODE_M) == SD_NO_CTL) {
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/* Find the minimum of all CTL edge powers that apply to this channel */
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twiceMaxEdgePower = AH_MIN(twiceMaxEdgePower, twiceMinEdgePower);
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} else {
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/* specific */
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twiceMaxEdgePower = twiceMinEdgePower;
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break;
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}
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}
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}
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minCtlPower = (uint8_t)AH_MIN(twiceMaxEdgePower, scaledPower);
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/* Apply ctl mode to correct target power set */
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switch(pCtlMode[ctlMode]) {
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case CTL_11B:
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for (i = 0; i < N(targetPowerCck.tPow2x); i++) {
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targetPowerCck.tPow2x[i] = (uint8_t)AH_MIN(targetPowerCck.tPow2x[i], minCtlPower);
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}
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break;
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case CTL_11A:
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case CTL_11G:
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for (i = 0; i < N(targetPowerOfdm.tPow2x); i++) {
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targetPowerOfdm.tPow2x[i] = (uint8_t)AH_MIN(targetPowerOfdm.tPow2x[i], minCtlPower);
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}
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break;
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case CTL_5GHT20:
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case CTL_2GHT20:
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for (i = 0; i < N(targetPowerHt20.tPow2x); i++) {
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targetPowerHt20.tPow2x[i] = (uint8_t)AH_MIN(targetPowerHt20.tPow2x[i], minCtlPower);
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}
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break;
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case CTL_11B_EXT:
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targetPowerCckExt.tPow2x[0] = (uint8_t)AH_MIN(targetPowerCckExt.tPow2x[0], minCtlPower);
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break;
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case CTL_11A_EXT:
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case CTL_11G_EXT:
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targetPowerOfdmExt.tPow2x[0] = (uint8_t)AH_MIN(targetPowerOfdmExt.tPow2x[0], minCtlPower);
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break;
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case CTL_5GHT40:
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case CTL_2GHT40:
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for (i = 0; i < N(targetPowerHt40.tPow2x); i++) {
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targetPowerHt40.tPow2x[i] = (uint8_t)AH_MIN(targetPowerHt40.tPow2x[i], minCtlPower);
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}
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break;
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default:
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return AH_FALSE;
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break;
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}
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} /* end ctl mode checking */
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/* Set rates Array from collected data */
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ar5416SetRatesArrayFromTargetPower(ah, chan, ratesArray,
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&targetPowerCck,
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&targetPowerCckExt,
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&targetPowerOfdm,
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&targetPowerOfdmExt,
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&targetPowerHt20,
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&targetPowerHt40);
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return AH_TRUE;
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#undef EXT_ADDITIVE
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#undef CTL_11A_EXT
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#undef CTL_11G_EXT
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#undef CTL_11B_EXT
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#undef SUB_NUM_CTL_MODES_AT_5G_40
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#undef SUB_NUM_CTL_MODES_AT_2G_40
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#undef N
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}
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#undef REDUCE_SCALED_POWER_BY_TWO_CHAIN
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#undef REDUCE_SCALED_POWER_BY_THREE_CHAIN
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/*
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* This is based off of the AR5416/AR9285 code and likely could
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* be unified in the future.
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@ -175,7 +365,7 @@ ar9287SetTransmitPower(struct ath_hal *ah,
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ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
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/* Fetch per-rate power table for the given channel */
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if (!ar9285SetPowerPerRateTable(ah, pEepData, chan,
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if (! ar9287SetPowerPerRateTable(ah, pEepData, chan,
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&ratesArray[0],cfgCtl,
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twiceAntennaReduction,
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twiceMaxRegulatoryPower, powerLimit)) {
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