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Increase the TSS limit by one byte. The processor requires an additional byte
with all bits set to 1 beyond the I/O permission bitmap. Prior to this change accessing I/O ports [0xFFF8-0xFFFF] would trigger a #GP fault even though the I/O bitmap allowed access to those ports. For more details see section "I/O Permission Bit Map" in the Intel SDM, Vol 1. Reviewed by: kib
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=266093
@ -1147,7 +1147,7 @@ struct soft_segment_descriptor gdt_segs[] = {
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.ssd_gran = 1 },
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/* GPROC0_SEL 9 Proc 0 Tss Descriptor */
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{ .ssd_base = 0x0,
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.ssd_limit = sizeof(struct amd64tss) + IOPAGES * PAGE_SIZE - 1,
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.ssd_limit = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE - 1,
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.ssd_type = SDT_SYSTSS,
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.ssd_dpl = SEL_KPL,
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.ssd_p = 1,
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@ -2003,8 +2003,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
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common_tss[0].tss_ist2 = (long) np;
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/* Set the IO permission bitmap (empty due to tss seg limit) */
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common_tss[0].tss_iobase = sizeof(struct amd64tss) +
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IOPAGES * PAGE_SIZE;
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common_tss[0].tss_iobase = sizeof(struct amd64tss) + IOPERM_BITMAP_SIZE;
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gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
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ltr(gsel_tss);
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@ -637,7 +637,7 @@ init_secondary(void)
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common_tss[cpu] = common_tss[0];
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common_tss[cpu].tss_rsp0 = 0; /* not used until after switch */
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common_tss[cpu].tss_iobase = sizeof(struct amd64tss) +
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IOPAGES * PAGE_SIZE;
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IOPERM_BITMAP_SIZE;
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common_tss[cpu].tss_ist1 = (long)&doublefault_stack[PAGE_SIZE];
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/* The NMI stack runs on IST2. */
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@ -338,7 +338,6 @@ amd64_set_ioperm(td, uap)
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char *iomap;
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struct amd64tss *tssp;
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struct system_segment_descriptor *tss_sd;
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u_long *addr;
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struct pcb *pcb;
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if ((error = priv_check(td, PRIV_IO)) != 0)
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@ -361,9 +360,7 @@ amd64_set_ioperm(td, uap)
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if (tssp == NULL)
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return (ENOMEM);
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iomap = (char *)&tssp[1];
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addr = (u_long *)iomap;
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for (i = 0; i < (ctob(IOPAGES) + 1) / sizeof(u_long); i++)
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*addr++ = ~0;
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memset(iomap, 0xff, IOPERM_BITMAP_SIZE);
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critical_enter();
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/* Takes care of tss_rsp0. */
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memcpy(tssp, &common_tss[PCPU_GET(cpuid)],
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@ -120,6 +120,12 @@
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#define MAXPAGESIZES 3 /* maximum number of supported page sizes */
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#define IOPAGES 2 /* pages of i/o permission bitmap */
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/*
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* I/O permission bitmap has a bit for each I/O port plus an additional
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* byte at the end with all bits set. See section "I/O Permission Bit Map"
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* in the Intel SDM for more details.
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*/
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#define IOPERM_BITMAP_SIZE (IOPAGES * PAGE_SIZE + 1)
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#ifndef KSTACK_PAGES
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#define KSTACK_PAGES 4 /* pages of kstack (with pcb) */
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