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Correct the delay durations as in the sample sources provided by Crystal Semiconductor.
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svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=55288
@ -286,7 +286,7 @@ csa_initialize(sc_p scp)
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* for a reset.
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*/
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csa_writeio(resp, BA0_ACCTL, 0);
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DELAY(250);
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DELAY(100);
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csa_writeio(resp, BA0_ACCTL, ACCTL_RSTN);
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/*
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@ -362,7 +362,7 @@ csa_initialize(sc_p scp)
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* First, lets wait a short while to let things settle out a bit,
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* and to prevent retrying the read too quickly.
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*/
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DELAY(250);
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DELAY(125);
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/*
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* Read the AC97 status register to see if we've seen a CODEC READY
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@ -398,7 +398,7 @@ csa_initialize(sc_p scp)
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#if notdef
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DELAY(10000000L); /* clw */
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#else
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DELAY(2500);
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DELAY(1000);
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#endif /* notdef */
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/*
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* Read the input slot valid register and see if input slots 3 and
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@ -477,7 +477,7 @@ csa_clearserialfifos(csa_res *resp)
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for (i = 0 ; i < 256 ; i++) {
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/* Make sure the previous FIFO write operation has completed. */
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for (j = 0 ; j < 5 ; j++) {
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DELAY(250);
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DELAY(100);
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serbst = csa_readio(resp, BA0_SERBST);
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if ((serbst & SERBST_WBSY) == 0)
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break;
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