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This is a driver for Fore PCA200E cards that uses busdma and works on

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little endian and big endian and with 32 and 64 bit pointers. It already
has the hooks to be used for HARP, NATM and ngATM.
This commit is contained in:
Hartmut Brandt 2003-06-23 14:46:12 +00:00
parent a97ec0069e
commit fb24f088ae
Notes: svn2git 2020-12-20 02:59:44 +00:00 
svn path=/head/; revision=116735
13 changed files with 6795 additions and 2 deletions
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2
share/man/man4/Makefile
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@ -53,6 +53,7 @@ MAN= aac.4 \
exca.4 \
faith.4 \
fast_ipsec.4 \
fatm.4 \
fd.4 \
fdc.4 \
firewire.4 \
@ -291,6 +292,7 @@ MLINKS+=ef.4 if_ef.4
MLINKS+=em.4 if_em.4
MLINKS+=en.4 if_en.4
MLINKS+=faith.4 if_faith.4
MLINKS+=fatm.4 if_fatm.4
MLINKS+=fd.4 stderr.4 fd.4 stdin.4 fd.4 stdout.4
MLINKS+=fpa.4 fea.4
MLINKS+=fwe.4 if_fwp.4

106
share/man/man4/fatm.4 Normal file
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@ -0,0 +1,106 @@
.\"
.\" Copyright (c) 2001-2003
.\" Fraunhofer Institute for Open Communication Systems (FhG Fokus).
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions and the following disclaimer.
.\" 2. Redistributions in binary form must reproduce the above copyright
.\" notice, this list of conditions and the following disclaimer in the
.\" documentation and/or other materials provided with the distribution.
.\"
.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
.\" SUCH DAMAGE.
.\"
.\" Author: Hartmut Brandt <harti@freebsd.org>
.\"
.\" $FreeBSD$
.\"
.\" fatm(4) man page
.\"
.Dd May 15, 2003
.Dt FATM 4
.Os FreeBSD
.Sh NAME
.Nm fatm
.Nd Device driver for Fore PCA200E ATM interfaces
.Sh SYNOPSIS
.Cd device fatm
.Cd device utopia
.Cd options atm
.Cd options NATM
.Sh DESCRIPTION
The
.Nm
device driver supports the FORE (now Marconi) PCA200E ATM interface cards.
The driver interfaces with the
.Xr natm 4
framework,
.Xr netgraph 4
and HARP.
It provides only PVC services. Signalling, ATMARP, ILMI and other
higher layer protocols are implemented using
.Xr netgraph 4
or HARP.
.Pp
For configuring the card for IP see
.Xr natmip 4 .
The following sysctls are recognized by the driver additionally to those
handled by
.Xr utopia 4 :
.Bl -tag -width XXX
.It Cm hw.atm.fatmN.stats
Returns a device specific statistic list of
.Dv uint32_t
statistic counters.
.It Cm hw.atm.fatmN.istats
Returns a list of
.Dv uint32_t
with internal driver statistics.
.It Cm hw.atm.fatmN.retry_tx
If this is set packets are stuffed back into the interface's send queue when
the cards transmit queue is found to be full. They are transmitted later.
If this is not set the packets are dropped. It may be useful to set this
if only UBR traffic is sent.
.It Cm hw.atm.fatmN.debug
.Em (only if debugging enabled)
These are debugging flags. See
.Fn if_fatmvar.h
for the possible flags.
.El
.Pp
The driver supports the media options
.Ar sdh ,
.Ar noscramb
and
.Ar unassigned
(see
.Xr utopia 4 ).
.Sh DIAGNOSTICS
.Bd -literal
fatm0: <FORE PCA200E> mem 0xd5800000-0xd59fffff irq 9 at device 9.0 on pci0
.Ed
.Sh SEE ALSO
.Xr natm 4 ,
.Xr natmip 4 ,
.Xr utopia 4
.Sh BUGS
These cards can CBR shape a single VCC only. It is currently possible to
request more than one CBR connection. In this case all the timing will be
wrong. See
.Xr hatm 4
for a better card.
.Sh AUTHORS
.An Harti Brandt Aq harti@freebsd.org .

1
share/man/man4/natm.4
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@ -87,6 +87,7 @@ the services exported.
.Sh SEE ALSO
.Xr en 4 ,
.Xr hatm 4 ,
.Xr fatm 4 ,
.Xr natmip 4
.Sh AUTHORS
.An Chuck Cranor

1
share/man/man4/natmip.4
View File

@ -106,6 +106,7 @@ route_host2="-iface 128.252.200.2 -link en0:3.0.0.cb"
.Sh SEE ALSO
.Xr en 4 ,
.Xr hatm 4 ,
.Xr fatm 4 ,
.Xr natm 4
.Sh AUTHORS
.An Chuck Cranor

7
sys/conf/NOTES
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@ -1677,13 +1677,15 @@ options MSIZE=512 # mbuf size in bytes
# The `hatm' device provides support for Fore/Marconi HE155 and HE622
# ATM PCI cards.
#
# The `fatm' device provides support for Fore PCA200E ATM PCI cards.
#
# atm device provides generic atm functions and is required for
# atm devices.
# NATM enables the netnatm protocol family that can be used to
# bypass TCP/IP.
#
# utopia provides the access to the ATM PHY chips and is required for en
# and hatm
# utopia provides the access to the ATM PHY chips and is required for en,
# hatm and fatm.
#
# the current driver supports only PVC operations (no atm-arp, no multicast).
# for more details, please read the original documents at
@ -1691,6 +1693,7 @@ options MSIZE=512 # mbuf size in bytes
#
device atm
device en
device fatm #Fore PCA200E
device hatm #Fore/Marconi HE155/622
device utopia #ATM PHY driver
options NATM #native ATM

1
sys/conf/files
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@ -392,6 +392,7 @@ dev/ex/if_ex_isa.c optional ex isa
dev/ex/if_ex_pccard.c optional ex card
#dev/ex/if_ex_pccard.c optional ex pccard
dev/exca/exca.c optional cbb
dev/fatm/if_fatm.c optional fatm pci
dev/fe/if_fe.c optional fe
dev/fe/if_fe_pccard.c optional fe card
dev/fe/if_fe_pccard.c optional fe pccard

2393
sys/dev/fatm/firmware.h Normal file
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sys/dev/fatm/if_fatm.c Normal file
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294
sys/dev/fatm/if_fatm_rate.h Normal file
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@ -0,0 +1,294 @@
/*
* Copyright (c) 2001-2003
* Fraunhofer Institute for Open Communication Systems (FhG Fokus).
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Author: Hartmut Brandt <harti@freebsd.org>
*
* Fore PCA200E driver for NATM
*
* This has been generated with:
*
* awk </dev/null 'BEGIN { period=255; linerate=353053; \
* printf "{ 0x00000000, %u },\n", linerate; \
* for(i=period-1; i>0; i--) printf "{ 0x%08x, %u },\n", \
* (i * 65536) + (period - i), i * linerate/period; }'
*
* $FreeBSD$
*/
{ 0x00000000, 353053 },
{ 0x00fe0001, 351668 },
{ 0x00fd0002, 350283 },
{ 0x00fc0003, 348899 },
{ 0x00fb0004, 347514 },
{ 0x00fa0005, 346130 },
{ 0x00f90006, 344745 },
{ 0x00f80007, 343361 },
{ 0x00f70008, 341976 },
{ 0x00f60009, 340592 },
{ 0x00f5000a, 339207 },
{ 0x00f4000b, 337823 },
{ 0x00f3000c, 336438 },
{ 0x00f2000d, 335054 },
{ 0x00f1000e, 333669 },
{ 0x00f0000f, 332285 },
{ 0x00ef0010, 330900 },
{ 0x00ee0011, 329516 },
{ 0x00ed0012, 328131 },
{ 0x00ec0013, 326747 },
{ 0x00eb0014, 325362 },
{ 0x00ea0015, 323978 },
{ 0x00e90016, 322593 },
{ 0x00e80017, 321209 },
{ 0x00e70018, 319824 },
{ 0x00e60019, 318439 },
{ 0x00e5001a, 317055 },
{ 0x00e4001b, 315670 },
{ 0x00e3001c, 314286 },
{ 0x00e2001d, 312901 },
{ 0x00e1001e, 311517 },
{ 0x00e0001f, 310132 },
{ 0x00df0020, 308748 },
{ 0x00de0021, 307363 },
{ 0x00dd0022, 305979 },
{ 0x00dc0023, 304594 },
{ 0x00db0024, 303210 },
{ 0x00da0025, 301825 },
{ 0x00d90026, 300441 },
{ 0x00d80027, 299056 },
{ 0x00d70028, 297672 },
{ 0x00d60029, 296287 },
{ 0x00d5002a, 294903 },
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{ 0x00d3002c, 292134 },
{ 0x00d2002d, 290749 },
{ 0x00d1002e, 289365 },
{ 0x00d0002f, 287980 },
{ 0x00cf0030, 286595 },
{ 0x00ce0031, 285211 },
{ 0x00cd0032, 283826 },
{ 0x00cc0033, 282442 },
{ 0x00cb0034, 281057 },
{ 0x00ca0035, 279673 },
{ 0x00c90036, 278288 },
{ 0x00c80037, 276904 },
{ 0x00c70038, 275519 },
{ 0x00c60039, 274135 },
{ 0x00c5003a, 272750 },
{ 0x00c4003b, 271366 },
{ 0x00c3003c, 269981 },
{ 0x00c2003d, 268597 },
{ 0x00c1003e, 267212 },
{ 0x00c0003f, 265828 },
{ 0x00bf0040, 264443 },
{ 0x00be0041, 263059 },
{ 0x00bd0042, 261674 },
{ 0x00bc0043, 260290 },
{ 0x00bb0044, 258905 },
{ 0x00ba0045, 257521 },
{ 0x00b90046, 256136 },
{ 0x00b80047, 254751 },
{ 0x00b70048, 253367 },
{ 0x00b60049, 251982 },
{ 0x00b5004a, 250598 },
{ 0x00b4004b, 249213 },
{ 0x00b3004c, 247829 },
{ 0x00b2004d, 246444 },
{ 0x00b1004e, 245060 },
{ 0x00b0004f, 243675 },
{ 0x00af0050, 242291 },
{ 0x00ae0051, 240906 },
{ 0x00ad0052, 239522 },
{ 0x00ac0053, 238137 },
{ 0x00ab0054, 236753 },
{ 0x00aa0055, 235368 },
{ 0x00a90056, 233984 },
{ 0x00a80057, 232599 },
{ 0x00a70058, 231215 },
{ 0x00a60059, 229830 },
{ 0x00a5005a, 228446 },
{ 0x00a4005b, 227061 },
{ 0x00a3005c, 225677 },
{ 0x00a2005d, 224292 },
{ 0x00a1005e, 222907 },
{ 0x00a0005f, 221523 },
{ 0x009f0060, 220138 },
{ 0x009e0061, 218754 },
{ 0x009d0062, 217369 },
{ 0x009c0063, 215985 },
{ 0x009b0064, 214600 },
{ 0x009a0065, 213216 },
{ 0x00990066, 211831 },
{ 0x00980067, 210447 },
{ 0x00970068, 209062 },
{ 0x00960069, 207678 },
{ 0x0095006a, 206293 },
{ 0x0094006b, 204909 },
{ 0x0093006c, 203524 },
{ 0x0092006d, 202140 },
{ 0x0091006e, 200755 },
{ 0x0090006f, 199371 },
{ 0x008f0070, 197986 },
{ 0x008e0071, 196602 },
{ 0x008d0072, 195217 },
{ 0x008c0073, 193833 },
{ 0x008b0074, 192448 },
{ 0x008a0075, 191063 },
{ 0x00890076, 189679 },
{ 0x00880077, 188294 },
{ 0x00870078, 186910 },
{ 0x00860079, 185525 },
{ 0x0085007a, 184141 },
{ 0x0084007b, 182756 },
{ 0x0083007c, 181372 },
{ 0x0082007d, 179987 },
{ 0x0081007e, 178603 },
{ 0x0080007f, 177218 },
{ 0x007f0080, 175834 },
{ 0x007e0081, 174449 },
{ 0x007d0082, 173065 },
{ 0x007c0083, 171680 },
{ 0x007b0084, 170296 },
{ 0x007a0085, 168911 },
{ 0x00790086, 167527 },
{ 0x00780087, 166142 },
{ 0x00770088, 164758 },
{ 0x00760089, 163373 },
{ 0x0075008a, 161989 },
{ 0x0074008b, 160604 },
{ 0x0073008c, 159219 },
{ 0x0072008d, 157835 },
{ 0x0071008e, 156450 },
{ 0x0070008f, 155066 },
{ 0x006f0090, 153681 },
{ 0x006e0091, 152297 },
{ 0x006d0092, 150912 },
{ 0x006c0093, 149528 },
{ 0x006b0094, 148143 },
{ 0x006a0095, 146759 },
{ 0x00690096, 145374 },
{ 0x00680097, 143990 },
{ 0x00670098, 142605 },
{ 0x00660099, 141221 },
{ 0x0065009a, 139836 },
{ 0x0064009b, 138452 },
{ 0x0063009c, 137067 },
{ 0x0062009d, 135683 },
{ 0x0061009e, 134298 },
{ 0x0060009f, 132914 },
{ 0x005f00a0, 131529 },
{ 0x005e00a1, 130145 },
{ 0x005d00a2, 128760 },
{ 0x005c00a3, 127375 },
{ 0x005b00a4, 125991 },
{ 0x005a00a5, 124606 },
{ 0x005900a6, 123222 },
{ 0x005800a7, 121837 },
{ 0x005700a8, 120453 },
{ 0x005600a9, 119068 },
{ 0x005500aa, 117684 },
{ 0x005400ab, 116299 },
{ 0x005300ac, 114915 },
{ 0x005200ad, 113530 },
{ 0x005100ae, 112146 },
{ 0x005000af, 110761 },
{ 0x004f00b0, 109377 },
{ 0x004e00b1, 107992 },
{ 0x004d00b2, 106608 },
{ 0x004c00b3, 105223 },
{ 0x004b00b4, 103839 },
{ 0x004a00b5, 102454 },
{ 0x004900b6, 101070 },
{ 0x004800b7, 99685 },
{ 0x004700b8, 98301 },
{ 0x004600b9, 96916 },
{ 0x004500ba, 95531 },
{ 0x004400bb, 94147 },
{ 0x004300bc, 92762 },
{ 0x004200bd, 91378 },
{ 0x004100be, 89993 },
{ 0x004000bf, 88609 },
{ 0x003f00c0, 87224 },
{ 0x003e00c1, 85840 },
{ 0x003d00c2, 84455 },
{ 0x003c00c3, 83071 },
{ 0x003b00c4, 81686 },
{ 0x003a00c5, 80302 },
{ 0x003900c6, 78917 },
{ 0x003800c7, 77533 },
{ 0x003700c8, 76148 },
{ 0x003600c9, 74764 },
{ 0x003500ca, 73379 },
{ 0x003400cb, 71995 },
{ 0x003300cc, 70610 },
{ 0x003200cd, 69226 },
{ 0x003100ce, 67841 },
{ 0x003000cf, 66457 },
{ 0x002f00d0, 65072 },
{ 0x002e00d1, 63687 },
{ 0x002d00d2, 62303 },
{ 0x002c00d3, 60918 },
{ 0x002b00d4, 59534 },
{ 0x002a00d5, 58149 },
{ 0x002900d6, 56765 },
{ 0x002800d7, 55380 },
{ 0x002700d8, 53996 },
{ 0x002600d9, 52611 },
{ 0x002500da, 51227 },
{ 0x002400db, 49842 },
{ 0x002300dc, 48458 },
{ 0x002200dd, 47073 },
{ 0x002100de, 45689 },
{ 0x002000df, 44304 },
{ 0x001f00e0, 42920 },
{ 0x001e00e1, 41535 },
{ 0x001d00e2, 40151 },
{ 0x001c00e3, 38766 },
{ 0x001b00e4, 37382 },
{ 0x001a00e5, 35997 },
{ 0x001900e6, 34613 },
{ 0x001800e7, 33228 },
{ 0x001700e8, 31843 },
{ 0x001600e9, 30459 },
{ 0x001500ea, 29074 },
{ 0x001400eb, 27690 },
{ 0x001300ec, 26305 },
{ 0x001200ed, 24921 },
{ 0x001100ee, 23536 },
{ 0x001000ef, 22152 },
{ 0x000f00f0, 20767 },
{ 0x000e00f1, 19383 },
{ 0x000d00f2, 17998 },
{ 0x000c00f3, 16614 },
{ 0x000b00f4, 15229 },
{ 0x000a00f5, 13845 },
{ 0x000900f6, 12460 },
{ 0x000800f7, 11076 },
{ 0x000700f8, 9691 },
{ 0x000600f9, 8307 },
{ 0x000500fa, 6922 },
{ 0x000400fb, 5538 },
{ 0x000300fc, 4153 },
{ 0x000200fd, 2769 },
{ 0x000100fe, 1384 },

499
sys/dev/fatm/if_fatmreg.h Normal file
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@ -0,0 +1,499 @@
/*
* Copyright (c) 2001-2003
* Fraunhofer Institute for Open Communication Systems (FhG Fokus).
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Author: Hartmut Brandt <harti@freebsd.org>
*
* $FreeBSD$
*
* Fore PCA200E hardware definitions.
*/
/*
* Fore implements some additional PCI registers. One of them is the
* master control register. One of the bits allow to automatically byte
* swap accesses to the on-board RAM.
*/
#define FATM_PCIR_MCTL 0x41
#define FATM_PCIM_SWAB 0x100
/*
* Operations codes for commands.
*/
enum {
FATM_OP_INITIALIZE = 0x01, /* Initialize the card */
FATM_OP_ACTIVATE_VCIN = 0x02, /* Start reassembly on a channel */
FATM_OP_ACTIVATE_VCOUT = 0x03, /* (not used) */
FATM_OP_DEACTIVATE_VCIN = 0x04, /* Stop reassembly on a channel */
FATM_OP_DEACTIVATE_VCOUT= 0x05, /* (not used) */
FATM_OP_REQUEST_STATS = 0x06, /* Get statistics */
FATM_OP_OC3_SET_REG = 0x07, /* Set OC3 chip register */
FATM_OP_OC3_GET_REG = 0x08, /* Get OC3 chip registers */
FATM_OP_ZERO_STATS = 0x09, /* Zero out statistics */
FATM_OP_GET_PROM_DATA = 0x0a, /* Return expansion ROM data */
FATM_OP_SETVPI_BITS = 0x0b, /* (not used, not implemented) */
FATM_OP_INTERRUPT_SEL = 0x80, /* Request interrupt on completion */
};
/*
* Status word definitions. Before initiating an operation the host sets the
* status word to PENDING. The card sets it to COMPLETE upon completion of
* the transmit/receive or command. An unused queue entry contains FREE.
* The ERROR can be ored into the COMPLETE. Note, that there are circumstances
* when ERROR is set without COMPLETE beeing set (when you try to activate
* a bad VCI like, for example, VCI 0).
*/
enum {
FATM_STAT_PENDING = 0x01,
FATM_STAT_COMPLETE = 0x02,
FATM_STAT_FREE = 0x04,
FATM_STAT_ERROR = 0x08,
};
/*
* On board queue offsets. There are two fundamentally different queue types:
* the command queue and all other queues. The command queue has 32 byte
* entries on the card which contain the operation code, parameters and the
* DMA pointer to the status word. All other queues have 8 byte entries, which
* contain a DMA pointer to the i/o block, that contains the parameters, and
* a DMA pointer to the status word.
*/
#define FATMOC_OP 0 /* cmd queue: offset to op code */
#define FATMOC_PARAM 4 /* cmd queue: offset to parameters */
#define FATMOC_STATP 16 /* cmd queue: offset to status ptr */
#define FATMOC_END 32 /* cmd queue: element size */
#define FATMOC_ACTIN_VPVC (FATMOC_PARAM + 0)
#define FATMOC_ACTIN_MTU (FATMOC_PARAM + 4)
#define FATMOC_DEACTIN_VPVC (FATMOC_PARAM + 0)
#define FATMOC_GETOC3_BUF (FATMOC_PARAM + 0)
#define FATMOC_GSTAT_BUF (FATMOC_PARAM + 0)
#define FATMOC_GPROM_BUF (FATMOC_PARAM + 0)
#define FATMOS_IOBLK 0 /* other queues: offset to ioblk ptr */
#define FATMOS_STATP 4 /* other queues: offset to status ptr */
#define FATM_MAKE_SETOC3(REG,VAL,MASK) \
(FATM_OP_OC3_SET_REG | (((REG) & 0xff) << 8) | \
(((VAL) & 0xff) << 16) | (((MASK) & 0xff) << 24))
#define FATM_NREGS 128
/*
* On board memory layout.
*
* The card contains up to 2MByte memory that is mapped at virtual offset 0.
* It is followed by three registers. The memory contains two areas at
* fixed addresses: the mon960 area that is used for communication with
* the card's operating system and the common block that is used by the
* firmware to communicate with the driver.
*/
#define FATM_RAM_SIZE (256 * 1024) /* normal RAM size */
#define FATMO_RAM (0x0) /* virtual RAM start */
#define FATMO_MON960 (0x400) /* mon960 communication area */
#define FATMO_COMMON_ORIGIN (0x4d40) /* firmware comm. area */
#define FATMO_HCR (0x100000) /* host control registers */
#define FATMO_HIMR (0x100004) /* host interrupt mask */
#define FATMO_PSR (0x100008) /* PCI control register */
#define FATMO_END (0x200000) /* end of mapped area */
/*
* The mon960 area contains two cells that are used as a virtual serial
* interface, a status word, the base for loading the application (i.e.
* firmware) and a version number.
*/
#define FATMO_UART_TO_960 (FATMO_MON960 + 0)
#define FATMO_UART_TO_HOST (FATMO_MON960 + 4)
#define FATMO_BOOT_STATUS (FATMO_MON960 + 8)
#define FATMO_APP_BASE (FATMO_MON960 + 12)
#define FATMO_VERSION (FATMO_MON960 + 16)
/*
* The host control register allows to hold the i960 or send it interrupts.
* The bits have different meaning on read and write.
*/
#define FATM_HCR_RESET 0x01 /* (W) reset the card */
#define FATM_HCR_LOCK_HOLD 0x02 /* (W) hold the i960 */
#define FATM_HCR_I960FAIL 0x04 /* (R) internal self-test failed */
#define FATM_HCR_INTR2 0x04 /* (W) assert i960 interrupt 2 */
#define FATM_HCR_HOLDA 0x08 /* (R) hold ack from i960 */
#define FATM_HCR_INTR1 0x08 /* (W) assert i960 interrupt 1 */
#define FATM_HCR_OFIFO 0x10 /* (R) DMA request FIFO full */
#define FATM_HCR_CLRIRQ 0x10 /* (W) clear interrupt request */
#define FATM_HCR_ESP_HOLD 0x20 /* (R) SAR chip holds i960 */
#define FATM_HCR_IFIFO 0x40 /* (R) input FIFO full */
#define FATM_HCR_TESTMODE 0x80 /* (R) board is in test mode */
/*
* The mon960 area contains a virtual UART and a status word.
* The UART uses a simple protocol: a zero means, that there is no
* character available from the i960 or that one can write the next
* character to the i960. This character has to be ored with 0x1000000
* to signal to the i960 that there is a new character.
* The cold_start values must be written to the status word, the others
* denote certain stages of initializing.
*/
#define XMIT_READY 0
#define CHAR_AVAIL 0x1000000
#define COLD_START 0xc01dc01d
#define SELF_TEST_OK 0x02201958
#define SELF_TEST_FAIL 0xadbadbad
#define CP_RUNNING 0xce11feed
#define MON906_TOO_BIG 0x10aded00
/*
* The firmware communication area contains a big structure most of which
* is used only during initialisation.
*/
/*
* These are the offsets to the onboard queues that are valid after the
* initialisation command has completed.
*/
#define FATMO_COMMAND_QUEUE (FATMO_COMMON_ORIGIN + 0)
#define FATMO_TRANSMIT_QUEUE (FATMO_COMMON_ORIGIN + 4)
#define FATMO_RECEIVE_QUEUE (FATMO_COMMON_ORIGIN + 8)
#define FATMO_SMALL_B1_QUEUE (FATMO_COMMON_ORIGIN + 12)
#define FATMO_LARGE_B1_QUEUE (FATMO_COMMON_ORIGIN + 16)
#define FATMO_SMALL_B2_QUEUE (FATMO_COMMON_ORIGIN + 20)
#define FATMO_LARGE_B2_QUEUE (FATMO_COMMON_ORIGIN + 24)
/*
* If the interrupt mask is set to 1, interrupts to the host are queued, but
* inhbited. The istat variable is set, when this card has posted an interrupt.
*/
#define FATMO_IMASK (FATMO_COMMON_ORIGIN + 28)
#define FATMO_ISTAT (FATMO_COMMON_ORIGIN + 32)
/*
* This is the offset and the size of the queue area. Could be used to
* dynamically compute queue sizes.
*/
#define FATMO_HEAP_BASE (FATMO_COMMON_ORIGIN + 36)
#define FATMO_HEAP_SIZE (FATMO_COMMON_ORIGIN + 40)
#define FATMO_HLOGGER (FATMO_COMMON_ORIGIN + 44)
/*
* The heartbeat variable is incremented in each loop of the normal processing.
* If it is stuck this means, that the card had a fatal error. In this case
* it may set the word to a number of values of the form 0xdeadXXXX where
* XXXX is an error code.
*/
#define FATMO_HEARTBEAT (FATMO_COMMON_ORIGIN + 48)
#define FATMO_FIRMWARE_RELEASE (FATMO_COMMON_ORIGIN + 52)
#define FATMO_MON960_RELEASE (FATMO_COMMON_ORIGIN + 56)
#define FATMO_TQ_PLEN (FATMO_COMMON_ORIGIN + 60)
/*
* At this offset the init command block is located. The init command cannot
* use the normal queue mechanism because it is used to initialize the
* queues. For this reason it is located at this fixed offset.
*/
#define FATMO_INIT (FATMO_COMMON_ORIGIN + 64)
/*
* physical media type
*/
#define FATMO_MEDIA_TYPE (FATMO_COMMON_ORIGIN + 176)
#define FATMO_OC3_REVISION (FATMO_COMMON_ORIGIN + 180)
/*
* End of the common block
*/
#define FATMO_COMMON_END (FATMO_COMMON_ORIGIN + 184)
/*
* The INITIALIZE command block. This is embedded into the above common
* block. The offsets are from the beginning of the command block.
*/
#define FATMOI_OP 0 /* operation code */
#define FATMOI_STATUS 4 /* status word */
#define FATMOI_RECEIVE_TRESHOLD 8 /* when to start interrupting */
#define FATMOI_NUM_CONNECT 12 /* max number of VCIs */
#define FATMOI_CQUEUE_LEN 16 /* length of command queue */
#define FATMOI_TQUEUE_LEN 20 /* length of transmit queue */
#define FATMOI_RQUEUE_LEN 24 /* length of receive queue */
#define FATMOI_RPD_EXTENSION 28 /* additional 32 byte blocks */
#define FATMOI_TPD_EXTENSION 32 /* additional 32 byte blocks */
#define FATMOI_CONLESS_VPVC 36 /* (not used) */
#define FATMOI_SMALL_B1 48 /* small buffer 1 pool */
#define FATMOI_LARGE_B1 64 /* small buffer 2 pool */
#define FATMOI_SMALL_B2 80 /* large buffer 1 pool */
#define FATMOI_LARGE_B2 96 /* large buffer 2 pool */
#define FATMOI_END 112 /* size of init block */
/*
* Each of the four buffer schemes is initialized with a block that
* contains four words:
*/
#define FATMOB_QUEUE_LENGTH 0 /* supply queue length */
#define FATMOB_BUFFER_SIZE 4 /* size of each buffer */
#define FATMOB_POOL_SIZE 8 /* size of on-board pool */
#define FATMOB_SUPPLY_BLKSIZE 12 /* number of buffers/supply */
/*
* The fore firmware is a binary file, that starts with a header. The
* header contains the offset to where the file must be loaded and the
* entry for execution. The header must also be loaded onto the card!
*/
struct firmware {
uint32_t id; /* "FORE" */
uint32_t version; /* firmware version */
uint32_t offset; /* load offset */
uint32_t entry; /* entry point */
};
#define FATM_FWID 0x65726f66 /* "FORE" */
#define FATM_FWVERSION 0x100 /* supported version */
/*
* PDUs to be transmitted are described by Transmit PDU Descriptors.
* These descriptors are held in host memory, but referenced from the ioblk
* member of the queue structure on the card. The card DMAs the descriptor
* and than gather-DMAs the PDU transmitting it on-the-fly. Tpds are variable
* length in blocks of 32 byte (8 words). The minimum length is one block,
* maximum 15. The number of blocks beyond 1 is configured during the
* initialisation command (tpd_extension).
* Each gather-DMA segment is described by a segment descriptor. The buffer
* address and the length must be a multiple of four.
* Tpd must also be 4 byte aligned.
* Because of the minimum length of 32 byte, the first blocks contains already
* 2 segement descriptors. Each extension block holds four descriptors.
*/
#define TXD_FIXED 2
#define SEGS_PER_BLOCK 4 /* segment descriptors per extension block */
struct txseg {
uint32_t buffer; /* DMA buffer address */
uint32_t length; /* and length */
};
struct tpd {
uint32_t atm_header; /* header for the transmitted cells */
uint32_t spec; /* PDU description */
uint32_t stream; /* traffic shaping word */
uint32_t pad[1];
struct txseg segment[TXD_FIXED];
};
#define TDX_MKSPEC(INTR,AAL,NSEG,LEN) \
(((INTR) << 28) | ((AAL) << 24) | ((NSEG) << 16) | (LEN))
#define TDX_MKSTR(DATA,IDLE) \
(((DATA) << 16) | (IDLE))
#define TDX_MKHDR(VPI,VCI,PT,CLP) \
(((VPI) << 20) | ((VCI) << 4) | ((PT) << 1) | (CLP))
#define TDX_SEGS2BLKS(SEGS) \
(1 + ((SEGS)-TXD_FIXED+SEGS_PER_BLOCK-1)/SEGS_PER_BLOCK)
/*
* We want probably support scatter transmission, so we use the maximum
* transmit descriptor extension that is possible. Because the size of the
* Tpd is encoded in 32-byte blocks in a 4-bit field, the maximum extension
* is 14 such blocks. The value for the init command is the number of
* additional descriptor entries NOT the number of 32 byte blocks.
*/
#define TPD_EXTENSION_BLOCKS 14
#define TPD_EXTENSIONS (TPD_EXTENSION_BLOCKS * 4)
#define TPD_SIZE ((size_t)((TPD_EXTENSION_BLOCKS+1) * 32))
/*
* Received PDUs are handed from the card to the host by means of Receive
* PDU descriptors. Each segment describes on part of the PDU. The buffer
* handle is a 32 bit value that is supplied by the host and passed
* transparently back to the host by the card. It is used to locate the buffer.
* The length field is the number of actual bytes in that buffer.
*/
#define RXD_FIXED 3
struct rxseg {
uint32_t handle; /* buffer handle */
uint32_t length; /* number of bytes */
};
struct rpd {
uint32_t atm_header;
uint32_t nseg;
struct rxseg segment[RXD_FIXED];
};
/*
* PDUs received are stored in buffers supplied to the card. We use only
* buffer scheme 1: small buffers are normal mbuf's which can hold three
* cells in their default size (256 byte) and mbuf clusters which can
* hold 42 cells (2 kbyte).
* The number of receive segments can be computed from these sizes:
*/
#define FATM_MAXPDU 65535
#define MAXPDU_CELLS ((FATM_MAXPDU+47)/48)
#define SMALL_BUFFER_CELLS (MHLEN/48)
#define LARGE_BUFFER_CELLS (MCLBYTES/48)
#define SMALL_BUFFER_LEN (SMALL_BUFFER_CELLS * 48)
#define LARGE_BUFFER_LEN (LARGE_BUFFER_CELLS * 48)
/*
* The card first alloctes a small buffer and the switches to large
* buffers. So the number of large buffers needed to store the maximum
* PDU is:
*/
#define MAX_LARGE_BUFFERS ((MAXPDU_CELLS - SMALL_BUFFER_CELLS \
+ LARGE_BUFFER_CELLS - 1) \
/ LARGE_BUFFER_CELLS) \
/*
* From this we get the number of extension blocks for the Rpds as:
*/
#define RPD_EXTENSION_BLOCKS ((MAX_LARGE_BUFFERS + 1 - RXD_FIXED \
+ SEGS_PER_BLOCK - 1) \
/ SEGS_PER_BLOCK)
#define RPD_EXTENSIONS (RPD_EXTENSION_BLOCKS * 4)
#define RPD_SIZE ((size_t)((RPD_EXTENSION_BLOCKS+1) * 32))
/*
* Buffers are supplied to the card prior receiving by the supply queues.
* We use two queues: scheme 1 small buffers and scheme 1 large buffers.
* The queues and on-card pools are initialized by the initialize command.
* Buffers are supplied in chunks. Each chunk can contain from 4 to 124
* buffers in multiples of four. The chunk sizes are configured by the
* initialize command. Each buffer in a chunk is described by a Receive
* Buffer Descriptor that is held in host memory and given as the ioblk
* to the card.
*/
#define BSUP_BLK2SIZE(CHUNK) (8 * (CHUNK))
struct rbd {
uint32_t handle;
uint32_t buffer; /* DMA address for card */
};
/*
* The PCA200E has an expansion ROM that contains version information and
* the FORE-assigned MAC address. It can be read via the get_prom_data
* operation.
*/
struct prom {
uint32_t version;
uint32_t serial;
uint8_t mac[8];
};
/*
* The media type member of the firmware communication block contains a
* code that describes the physical medium and physical protocol.
*/
#define FORE_MT_TAXI_100 0x04
#define FORE_MT_TAXI_140 0x05
#define FORE_MT_UTP_SONET 0x06
#define FORE_MT_MM_OC3_ST 0x16
#define FORE_MT_MM_OC3_SC 0x26
#define FORE_MT_SM_OC3_ST 0x36
#define FORE_MT_SM_OC3_SC 0x46
/*
* Assorted constants
*/
#define FORE_MAX_VCC 1024 /* max. number of VCIs supported */
#define FORE_VCIBITS 10
#define FATM_STATE_TIMEOUT 500 /* msec */
/*
* Statistics as delivered by the FORE cards
*/
struct fatm_stats {
struct {
uint32_t crc_header_errors;
uint32_t framing_errors;
uint32_t pad[2];
} phy_4b5b;
struct {
uint32_t section_bip8_errors;
uint32_t path_bip8_errors;
uint32_t line_bip24_errors;
uint32_t line_febe_errors;
uint32_t path_febe_errors;
uint32_t corr_hcs_errors;
uint32_t ucorr_hcs_errors;
uint32_t pad[1];
} phy_oc3;
struct {
uint32_t cells_transmitted;
uint32_t cells_received;
uint32_t vpi_bad_range;
uint32_t vpi_no_conn;
uint32_t vci_bad_range;
uint32_t vci_no_conn;
uint32_t pad[2];
} atm;
struct {
uint32_t cells_transmitted;
uint32_t cells_received;
uint32_t cells_dropped;
uint32_t pad[1];
} aal0;
struct {
uint32_t cells_transmitted;
uint32_t cells_received;
uint32_t cells_crc_errors;
uint32_t cels_protocol_errors;
uint32_t cells_dropped;
uint32_t cspdus_transmitted;
uint32_t cspdus_received;
uint32_t cspdus_protocol_errors;
uint32_t cspdus_dropped;
uint32_t pad[3];
} aal4;
struct {
uint32_t cells_transmitted;
uint32_t cells_received;
uint32_t congestion_experienced;
uint32_t cells_dropped;
uint32_t cspdus_transmitted;
uint32_t cspdus_received;
uint32_t cspdus_crc_errors;
uint32_t cspdus_protocol_errors;
uint32_t cspdus_dropped;
uint32_t pad[3];
} aal5;
struct {
uint32_t small_b1_failed;
uint32_t large_b1_failed;
uint32_t small_b2_failed;
uint32_t large_b2_failed;
uint32_t rpd_alloc_failed;
uint32_t receive_carrier;
uint32_t pad[2];
} aux;
};
#define FATM_NSTATS 42

390
sys/dev/fatm/if_fatmvar.h Normal file
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@ -0,0 +1,390 @@
/*
* Copyright (c) 2001-2003
* Fraunhofer Institute for Open Communication Systems (FhG Fokus).
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Author: Hartmut Brandt <harti@freebsd.org>
*
* $FreeBSD$
*
* Fore PCA200E driver definitions.
*/
/*
* Debug statistics of the PCA200 driver
*/
struct istats {
uint32_t cmd_queue_full;
uint32_t get_stat_errors;
uint32_t clr_stat_errors;
uint32_t get_prom_errors;
uint32_t suni_reg_errors;
uint32_t tx_queue_full;
uint32_t tx_queue_almost_full;
uint32_t tx_pdu2big;
uint32_t tx_too_many_segs;
uint32_t tx_retry;
uint32_t fix_empty;
uint32_t fix_addr_copy;
uint32_t fix_addr_noext;
uint32_t fix_addr_ext;
uint32_t fix_len_noext;
uint32_t fix_len_copy;
uint32_t fix_len;
uint32_t rx_badvc;
uint32_t rx_closed;
};
/*
* Addresses on the on-board RAM are expressed as offsets to the
* start of that RAM.
*/
typedef uint32_t cardoff_t;
/*
* The card uses a number of queues for communication with the host.
* Parts of the queue are located on the card (pointers to the status
* word and the ioblk and the command blocks), the rest in host memory.
* Each of these queues forms a ring, where the head and tail pointers are
* managed * either by the card or the host. For the receive queue the
* head is managed by the card (and not used altogether by the host) and the
* tail by the host - for all other queues its the other way around.
* The host resident parts of the queue entries contain pointers to
* the host resident status and the host resident ioblk (the latter not for
* the command queue) as well as DMA addresses for supply to the card.
*/
struct fqelem {
cardoff_t card; /* corresponding element on card */
bus_addr_t card_ioblk; /* ioblk address to supply to card */
volatile uint32_t *statp; /* host status pointer */
void *ioblk; /* host ioblk (not for commands) */
};
struct fqueue {
struct fqelem *chunk; /* pointer to the element array */
int head; /* queue head */
int tail; /* queue tail */
};
/*
* Queue manipulation macros
*/
#define NEXT_QUEUE_ENTRY(HEAD,LEN) ((HEAD) = ((HEAD) + 1) % LEN)
#define GET_QUEUE(Q,TYPE,IDX) (&((TYPE *)(Q).chunk)[(IDX)])
/*
* Now define structures for the different queues. Each of these structures
* must start with a struct fqelem.
*/
struct txqueue { /* transmit queue element */
struct fqelem q;
struct mbuf *m; /* the chain we are transmitting */
bus_dmamap_t map; /* map for the packet */
};
struct rxqueue { /* receive queue element */
struct fqelem q;
};
struct supqueue { /* supply queue element */
struct fqelem q;
};
struct cmdqueue;
struct fatm_softc;
typedef void (*completion_cb)(struct fatm_softc *, struct cmdqueue *);
struct cmdqueue { /* command queue element */
struct fqelem q;
completion_cb cb; /* call on command completion */
int error; /* set if error occured */
};
/*
* Card-DMA-able memory is managed by means of the bus_dma* functions.
* To allocate a chunk of memory with a specific size and alignment one
* has to:
* 1. create a DMA tag
* 2. allocate the memory
* 3. load the memory into a map.
* This finally gives the physical address that can be given to the card.
* The card can DMA the entire 32-bit space without boundaries. We assume,
* that all the allocations can be mapped in one contiguous segment. This
* may be wrong in the future if we have more than 32 bit addresses.
* Allocation is done at attach time and managed by the following structure.
*
* This could be done easier with the NetBSD bus_dma* functions. They appear
* to be more useful and consistent.
*/
struct fatm_mem {
u_int size; /* size */
u_int align; /* alignment */
bus_dma_tag_t dmat; /* DMA tag */
void *mem; /* memory block */
bus_addr_t paddr; /* pysical address */
bus_dmamap_t map; /* map */
};
/*
* Each of these structures describes one receive buffer while the buffer
* is on the card or in the receive return queue. These structures are
* allocated at initialisation time together with the DMA maps. The handle that
* is given to the card is the index into the array of these structures.
*/
struct rbuf {
struct mbuf *m; /* the mbuf while we are on the card */
bus_dmamap_t map; /* the map */
LIST_ENTRY(rbuf) link; /* the free list link */
};
LIST_HEAD(rbuf_list, rbuf);
/*
* The driver maintains a list of all open VCCs. Because we
* use only VPI=0 and a maximum VCI of 1024, the list is rather an array
* than a list. We also store the atm pseudoheader flags here and the
* rxhand (aka. protocol block).
*/
struct card_vcc {
void *rxhand;
uint32_t pcr;
uint32_t flags;
uint8_t aal;
uint8_t traffic;
};
#define FATM_VCC_OPEN 0x00010000 /* is open */
#define FATM_VCC_TRY_OPEN 0x00020000 /* is currently opening */
#define FATM_VCC_TRY_CLOSE 0x00040000 /* is currently closing */
#define FATM_VCC_BUSY 0x00070000 /* one of the above */
/*
* Finally the softc structure
*/
struct fatm_softc {
struct ifatm ifatm; /* common part */
struct mtx mtx; /* lock this structure */
struct ifmedia media; /* media */
int init_state; /* initialisation step */
int memid; /* resource id for card memory */
struct resource *memres; /* resource for card memory */
bus_space_handle_t memh; /* handle for card memory */
bus_space_tag_t memt; /* tag for card memory */
int irqid; /* resource id for interrupt */
struct resource *irqres; /* resource for interrupt */
void *ih; /* interrupt handler */
bus_dma_tag_t parent_dmat; /* parent DMA tag */
struct fatm_mem stat_mem; /* memory for status blocks */
struct fatm_mem txq_mem; /* TX descriptor queue */
struct fatm_mem rxq_mem; /* RX descriptor queue */
struct fatm_mem s1q_mem; /* Small buffer 1 queue */
struct fatm_mem l1q_mem; /* Large buffer 1 queue */
struct fatm_mem prom_mem; /* PROM memory */
struct fqueue txqueue; /* transmission queue */
struct fqueue rxqueue; /* receive queue */
struct fqueue s1queue; /* SMALL S1 queue */
struct fqueue l1queue; /* LARGE S1 queue */
struct fqueue cmdqueue; /* command queue */
/* fields for access to the SUNI registers */
struct fatm_mem reg_mem; /* DMAable memory for readregs */
struct cv cv_regs; /* to serialize access to reg_mem */
/* fields for access to statistics */
struct fatm_mem sadi_mem; /* sadistics memory */
struct cv cv_stat; /* to serialize access to sadi_mem */
u_int flags;
#define FATM_STAT_INUSE 0x0001
#define FATM_REGS_INUSE 0x0002
u_int txcnt; /* number of used transmit desc */
int retry_tx; /* keep mbufs in queue if full */
struct card_vcc *vccs; /* table of vccs */
int open_vccs; /* number of vccs in use */
int small_cnt; /* number of buffers owned by card */
int large_cnt; /* number of buffers owned by card */
/* receiving */
struct rbuf *rbufs; /* rbuf array */
struct rbuf_list rbuf_free; /* free rbufs list */
struct rbuf_list rbuf_used; /* used rbufs list */
u_int rbuf_total; /* total number of buffs */
bus_dma_tag_t rbuf_tag; /* tag for rbuf mapping */
/* transmission */
bus_dma_tag_t tx_tag; /* transmission tag */
uint32_t heartbeat; /* last heartbeat */
u_int stop_cnt; /* how many times checked */
struct istats istats; /* internal statistics */
/* SUNI state */
struct utopia utopia;
/* sysctl support */
struct sysctl_ctx_list sysctl_ctx;
struct sysctl_oid *sysctl_tree;
#ifdef FATM_DEBUG
/* debugging */
u_int debug;
#endif
};
#ifndef FATM_DEBUG
#define FATM_LOCK(SC) mtx_lock(&(SC)->mtx)
#define FATM_UNLOCK(SC) mtx_unlock(&(SC)->mtx)
#else
#define FATM_LOCK(SC) do { \
DBG(SC, LOCK, ("locking in line %d", __LINE__)); \
mtx_lock(&(SC)->mtx); \
} while (0)
#define FATM_UNLOCK(SC) do { \
DBG(SC, LOCK, ("unlocking in line %d", __LINE__)); \
mtx_unlock(&(SC)->mtx); \
} while (0)
#endif
#define FATM_CHECKLOCK(SC) mtx_assert(&sc->mtx, MA_OWNED)
/*
* Macros to access host memory fields that are also access by the card.
* These fields need to little-endian always.
*/
#define H_GETSTAT(STATP) (le32toh(*(STATP)))
#define H_SETSTAT(STATP, S) do { *(STATP) = htole32(S); } while (0)
#define H_SETDESC(DESC, D) do { (DESC) = htole32(D); } while (0)
#ifdef notyet
#define H_SYNCSTAT_POSTREAD(SC, P) \
bus_dmamap_sync_size((SC)->stat_mem.dmat, \
(SC)->stat_mem.map, \
(volatile char *)(P) - (volatile char *)(SC)->stat_mem.mem, \
sizeof(volatile uint32_t), BUS_DMASYNC_POSTREAD)
#define H_SYNCSTAT_PREWRITE(SC, P) \
bus_dmamap_sync_size((SC)->stat_mem.dmat, \
(SC)->stat_mem.map, \
(volatile char *)(P) - (volatile char *)(SC)->stat_mem.mem, \
sizeof(volatile uint32_t), BUS_DMASYNC_PREWRITE)
#define H_SYNCQ_PREWRITE(M, P, SZ) \
bus_dmamap_sync_size((M)->dmat, (M)->map, \
(volatile char *)(P) - (volatile char *)(M)->mem, (SZ), \
BUS_DMASYNC_PREWRITE)
#define H_SYNCQ_POSTREAD(M, P, SZ) \
bus_dmamap_sync_size((M)->dmat, (M)->map, \
(volatile char *)(P) - (volatile char *)(M)->mem, (SZ), \
BUS_DMASYNC_POSTREAD)
#else
#define H_SYNCSTAT_POSTREAD(SC, P) do { } while (0)
#define H_SYNCSTAT_PREWRITE(SC, P) do { } while (0)
#define H_SYNCQ_PREWRITE(M, P, SZ) do { } while (0)
#define H_SYNCQ_POSTREAD(M, P, SZ) do { } while (0)
#endif
/*
* Macros to manipulate VPVCs
*/
#define MKVPVC(VPI,VCI) (((VPI) << 16) | (VCI))
#define GETVPI(VPVC) (((VPVC) >> 16) & 0xff)
#define GETVCI(VPVC) ((VPVC) & 0xffff)
/*
* These macros encapsulate the bus_space functions for better readabiliy.
*/
#define WRITE4(SC, OFF, VAL) bus_space_write_4(SC->memt, SC->memh, OFF, VAL)
#define WRITE1(SC, OFF, VAL) bus_space_write_1(SC->memt, SC->memh, OFF, VAL)
#define READ4(SC, OFF) bus_space_read_4(SC->memt, SC->memh, OFF)
#define READ1(SC, OFF) bus_space_read_1(SC->memt, SC->memh, OFF)
#define BARRIER_R(SC) \
bus_space_barrier(SC->memt, SC->memh, 0, FATMO_END, \
BUS_SPACE_BARRIER_READ)
#define BARRIER_W(SC) \
bus_space_barrier(SC->memt, SC->memh, 0, FATMO_END, \
BUS_SPACE_BARRIER_WRITE)
#define BARRIER_RW(SC) \
bus_space_barrier(SC->memt, SC->memh, 0, FATMO_END, \
BUS_SPACE_BARRIER_WRITE|BUS_SPACE_BARRIER_READ)
#ifdef FATM_DEBUG
#define DBG(SC, FL, PRINT) do { \
if ((SC)->debug & DBG_##FL) { \
if_printf(&(SC)->ifatm.ifnet, "%s: ", __func__); \
printf PRINT; \
printf("\n"); \
} \
} while (0)
#define DBGC(SC, FL, PRINT) do { \
if ((SC)->debug & DBG_##FL) \
printf PRINT; \
} while (0)
enum {
DBG_RCV = 0x0001,
DBG_XMIT = 0x0002,
DBG_VCC = 0x0004,
DBG_IOCTL = 0x0008,
DBG_ATTACH = 0x0010,
DBG_INIT = 0x0020,
DBG_DMA = 0x0040,
DBG_BEAT = 0x0080,
DBG_UART = 0x0100,
DBG_LOCK = 0x0200,
DBG_ALL = 0xffff
};
#else
#define DBG(SC, FL, PRINT)
#define DBGC(SC, FL, PRINT)
#endif
/*
* Configuration.
*
* This section contains tunable parameters and dependend defines.
*/
#define FATM_CMD_QLEN 16 /* command queue length */
#ifndef TEST_DMA_SYNC
#define FATM_TX_QLEN 128 /* transmit queue length */
#define FATM_RX_QLEN 64 /* receive queue length */
#else
#define FATM_TX_QLEN 8 /* transmit queue length */
#define FATM_RX_QLEN 8 /* receive queue length */
#endif
#define SMALL_SUPPLY_QLEN 16
#define SMALL_POOL_SIZE 256
#define SMALL_SUPPLY_BLKSIZE 8
#define LARGE_SUPPLY_QLEN 16
#define LARGE_POOL_SIZE 128
#define LARGE_SUPPLY_BLKSIZE 8

1
sys/modules/Makefile
View File

@ -30,6 +30,7 @@ SUBDIR= accf_data \
digi \
dummynet \
en \
fatm \
fdc \
fdescfs \
firewire \

19
sys/modules/fatm/Makefile Normal file
View File

@ -0,0 +1,19 @@
# $FreeBSD$
#
# Author: Harti Brandt <harti@freebsd.org>
#
.PATH: ${.CURDIR}/../../dev/fatm
KMOD= if_fatm
SRCS= if_fatm.c device_if.h bus_if.h pci_if.h opt_inet.h opt_natm.h
# CFLAGS+= -DFATM_DEBUG=0 -DINVARIANT_SUPPORT -DINVARIANTS -g
# LDFLAGS+= -g
opt_inet.h:
echo "#define INET 1" > opt_inet.h
opt_natm.h:
echo "#define NATM 1" > opt_natm.h
.include <bsd.kmod.mk>