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- Correct a problem with the last commit. The CMAP ptes need to be zeroed
prior to invalidating the TLB to be certain that the processor doesn't keep a cached copy. Discussed with: pete Paniced: tegge Pointy Hat: The usual spot
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Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=120613
@ -2531,6 +2531,7 @@ pmap_zero_page(vm_page_t m)
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else
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#endif
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bzero(CADDR2, PAGE_SIZE);
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*CMAP2 = 0;
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#ifdef I386_CPU
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invltlb();
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#else
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@ -2539,7 +2540,6 @@ pmap_zero_page(vm_page_t m)
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#ifdef SMP
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curthread->td_pcb->pcb_switchout = NULL;
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#endif
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*CMAP2 = 0;
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mtx_unlock(&CMAPCADDR12_lock);
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}
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@ -2566,6 +2566,7 @@ pmap_zero_page_area(vm_page_t m, int off, int size)
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else
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#endif
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bzero((char *)CADDR2 + off, size);
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*CMAP2 = 0;
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#ifdef I386_CPU
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invltlb();
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#else
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@ -2574,7 +2575,6 @@ pmap_zero_page_area(vm_page_t m, int off, int size)
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#ifdef SMP
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curthread->td_pcb->pcb_switchout = NULL;
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#endif
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*CMAP2 = 0;
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mtx_unlock(&CMAPCADDR12_lock);
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}
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@ -2600,6 +2600,7 @@ pmap_zero_page_idle(vm_page_t m)
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else
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#endif
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bzero(CADDR3, PAGE_SIZE);
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*CMAP3 = 0;
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#ifdef I386_CPU
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invltlb();
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#else
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@ -2608,7 +2609,6 @@ pmap_zero_page_idle(vm_page_t m)
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#ifdef SMP
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curthread->td_pcb->pcb_switchout = NULL;
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#endif
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*CMAP3 = 0;
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}
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/*
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@ -2632,6 +2632,8 @@ pmap_copy_page(vm_page_t src, vm_page_t dst)
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*CMAP1 = PG_V | VM_PAGE_TO_PHYS(src) | PG_A;
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*CMAP2 = PG_V | PG_RW | VM_PAGE_TO_PHYS(dst) | PG_A | PG_M;
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bcopy(CADDR1, CADDR2, PAGE_SIZE);
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*CMAP1 = 0;
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*CMAP2 = 0;
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#ifdef I386_CPU
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invltlb();
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#else
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@ -2641,8 +2643,6 @@ pmap_copy_page(vm_page_t src, vm_page_t dst)
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#ifdef SMP
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curthread->td_pcb->pcb_switchout = NULL;
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#endif
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*CMAP1 = 0;
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*CMAP2 = 0;
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mtx_unlock(&CMAPCADDR12_lock);
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}
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