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https://git.FreeBSD.org/src.git
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Restore (undocumented) support for early revisions and add more comments.
Reported by: kris
This commit is contained in:
Jung-uk Kim
parent
f0bb05fca5
commit
fdfa6079a2
Notes:
svn2git
2020-12-20 02:59:44 +00:00
svn path=/head/; revision=197205
@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <machine/cpufunc.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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@ -58,10 +59,14 @@ typedef enum {
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struct amdtemp_softc {
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device_t sc_dev;
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uint32_t sc_mask;
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int sc_ncores;
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int sc_ntemps;
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int sc_swap;
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int sc_flags;
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#define AMDTEMP_FLAG_DO_QUIRK 0x01 /* DiodeOffset may be incorrect. */
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#define AMDTEMP_FLAG_DO_ZERO 0x02 /* DiodeOffset starts from 0C. */
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#define AMDTEMP_FLAG_DO_SIGN 0x04 /* DiodeOffsetSignBit is present. */
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#define AMDTEMP_FLAG_CS_SWAP 0x08 /* ThermSenseCoreSel is inverted. */
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#define AMDTEMP_FLAG_CT_10BIT 0x10 /* CurTmp is 10-bit wide. */
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int32_t (*sc_gettemp)(device_t, amdsensor_t);
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struct sysctl_oid *sc_sysctl_cpu[MAXCPU];
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struct intr_config_hook sc_ich;
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@ -168,30 +173,22 @@ amdtemp_identify(driver_t *driver, device_t parent)
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static int
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amdtemp_probe(device_t dev)
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{
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uint32_t cpuid, family, model, temp;
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uint32_t family, model;
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if (resource_disabled("amdtemp", 0))
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return (ENXIO);
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cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4);
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family = CPUID_TO_FAMILY(cpuid);
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model = CPUID_TO_MODEL(cpuid);
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family = CPUID_TO_FAMILY(cpu_id);
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model = CPUID_TO_MODEL(cpu_id);
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switch (family) {
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case 0x0f:
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if ((model == 0x04 && (cpuid & CPUID_STEPPING) == 0) ||
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(model == 0x05 && (cpuid & CPUID_STEPPING) <= 1))
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if ((model == 0x04 && (cpu_id & CPUID_STEPPING) == 0) ||
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(model == 0x05 && (cpu_id & CPUID_STEPPING) <= 1))
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return (ENXIO);
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break;
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case 0x10:
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case 0x11:
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/*
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* DiodeOffset must be non-zero if thermal diode is supported.
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*/
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temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 4);
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temp = (temp >> 8) & 0x7f;
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if (temp == 0)
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return (ENXIO);
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break;
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default:
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return (ENXIO);
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@ -207,32 +204,66 @@ amdtemp_attach(device_t dev)
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struct amdtemp_softc *sc = device_get_softc(dev);
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struct sysctl_ctx_list *sysctlctx;
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struct sysctl_oid *sysctlnode;
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uint32_t regs[4];
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uint32_t cpuid, family, model;
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cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4);
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family = CPUID_TO_FAMILY(cpuid);
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model = CPUID_TO_MODEL(cpuid);
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/*
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* Errata #154: Incorect Diode Offset
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*/
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if (cpu_id == 0x20f32) {
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do_cpuid(0x80000001, regs);
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if ((regs[1] & 0xfff) == 0x2c)
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sc->sc_flags |= AMDTEMP_FLAG_DO_QUIRK;
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}
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/*
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* CPUID Register is available from Revision F.
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*/
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family = CPUID_TO_FAMILY(cpu_id);
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model = CPUID_TO_MODEL(cpu_id);
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if (family != 0x0f || model >= 0x40) {
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cpuid = pci_read_config(dev, AMDTEMP_CPUID, 4);
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family = CPUID_TO_FAMILY(cpuid);
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model = CPUID_TO_MODEL(cpuid);
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}
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switch (family) {
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case 0x0f:
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/*
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* Thermaltrip Status Register - CurTmp
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* Thermaltrip Status Register
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*
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* - DiodeOffsetSignBit
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*
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* Revision D & E: bit 24
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* Other: N/A
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*
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* - ThermSenseCoreSel
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*
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* Revision F & G: 0 - Core1, 1 - Core0
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* Other: 0 - Core0, 1 - Core1
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*
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* - CurTmp
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*
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* Revision G: bits 23-14
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* Earlier: bits 23-16
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*/
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if (model >= 0x60 && model != 0xc1)
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sc->sc_mask = 0x3ff << 14;
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else
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sc->sc_mask = 0xff << 16;
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/*
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* Thermaltrip Status Register - ThermSenseCoreSel
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* Other: bits 23-16
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*
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* Revision F: 0 - Core1, 1 - Core0
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* Earlier: 0 - Core0, 1 - Core1
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* XXX According to the BKDG, CurTmp, ThermSenseSel and
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* ThermSenseCoreSel bits were introduced in Revision F
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* but CurTmp seems working fine as early as Revision C.
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* However, it is not clear whether ThermSenseSel and/or
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* ThermSenseCoreSel work in undocumented cases as well.
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* In fact, the Linux driver suggests it may not work but
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* we just assume it does until we find otherwise.
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*/
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sc->sc_swap = (model >= 0x40);
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if (model < 0x40) {
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sc->sc_flags |= AMDTEMP_FLAG_DO_ZERO;
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if (model >= 0x10)
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sc->sc_flags |= AMDTEMP_FLAG_DO_SIGN;
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} else {
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sc->sc_flags |= AMDTEMP_FLAG_CS_SWAP;
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if (model >= 0x60 && model != 0xc1)
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sc->sc_flags |= AMDTEMP_FLAG_CT_10BIT;
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}
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/*
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* There are two sensors per core.
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@ -243,11 +274,6 @@ amdtemp_attach(device_t dev)
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break;
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case 0x10:
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case 0x11:
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/*
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* Reported Temperature Control Register - Curtmp
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*/
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sc->sc_mask = 0x3ff << 21;
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/*
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* There is only one sensor per package.
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*/
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@ -413,7 +439,7 @@ static int32_t
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amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
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{
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struct amdtemp_softc *sc = device_get_softc(dev);
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uint32_t temp;
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uint32_t mask, temp;
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int32_t diode_offset, offset;
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uint8_t cfg, sel;
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@ -425,7 +451,7 @@ amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
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/* FALLTHROUGH */
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case SENSOR0_CORE0:
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case CORE0:
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if (sc->sc_swap)
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if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) != 0)
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sel |= AMDTEMP_TTSR_SELCORE;
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break;
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case SENSOR1_CORE1:
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@ -433,7 +459,7 @@ amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
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/* FALLTHROUGH */
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case SENSOR0_CORE1:
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case CORE1:
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if (!sc->sc_swap)
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if ((sc->sc_flags & AMDTEMP_FLAG_CS_SWAP) == 0)
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sel |= AMDTEMP_TTSR_SELCORE;
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break;
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}
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@ -447,10 +473,19 @@ amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
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/* Adjust offset if DiodeOffset is set and valid. */
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temp = pci_read_config(dev, AMDTEMP_THERMTP_STAT, 4);
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diode_offset = (temp >> 8) & 0x3f;
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if (diode_offset != 0)
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if ((sc->sc_flags & AMDTEMP_FLAG_DO_ZERO) != 0) {
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if ((sc->sc_flags & AMDTEMP_FLAG_DO_SIGN) != 0 &&
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((temp >> 24) & 0x1) != 0)
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diode_offset *= -1;
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if ((sc->sc_flags & AMDTEMP_FLAG_DO_QUIRK) != 0 &&
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((temp >> 25) & 0xf) <= 2)
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diode_offset += 10;
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offset += diode_offset * 10;
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} else if (diode_offset != 0)
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offset += (diode_offset - 11) * 10;
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temp = ((temp & sc->sc_mask) >> 14) * 5 / 2 + offset;
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mask = (sc->sc_flags & AMDTEMP_FLAG_CT_10BIT) != 0 ? 0x3ff : 0x3fc;
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temp = ((temp >> 14) & mask) * 5 / 2 + offset;
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return (temp);
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}
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@ -458,7 +493,6 @@ amdtemp_gettemp0f(device_t dev, amdsensor_t sensor)
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static int32_t
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amdtemp_gettemp(device_t dev, amdsensor_t sensor)
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{
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struct amdtemp_softc *sc = device_get_softc(dev);
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uint32_t temp;
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int32_t diode_offset, offset;
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@ -472,7 +506,7 @@ amdtemp_gettemp(device_t dev, amdsensor_t sensor)
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offset += (diode_offset - 11) * 10;
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temp = pci_read_config(dev, AMDTEMP_REPTMP_CTRL, 4);
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temp = ((temp & sc->sc_mask) >> 21) * 5 / 4 + offset;
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temp = ((temp >> 21) & 0x7ff) * 5 / 4 + offset;
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return (temp);
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}
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