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Commit Graph

1039 Commits

Author SHA1 Message Date
Peter Wemm
176ce2b1f4 Add 64 bit bsf*/ffs* routines. Have the ffs() inline use gcc's builtin
because it uses the better cmove instructions to avoid branches.
2003-12-06 23:22:43 +00:00
Peter Wemm
62b689edc9 Kill the ASM versions of the mtx_lock_spin and friends. They were never
used on amd64, and were actually totally broken.  They had the wrong
calling conventions.  I believe the i386 versions are going away too.

Approved by:  re (scottl)
2003-12-06 23:17:18 +00:00
Peter Wemm
42f5377536 Revert some amd64 changes that cached curthread and converge back to the
i386 version.  The curthread special case in pcpu.h solves my complaint
about the verbose macro expansion in this case.  Note that the i386
version still has some OBE comments, I didn't re-add them back again.

Approved by:  re (scottl)
2003-12-06 23:13:22 +00:00
Peter Wemm
cda078658e Cosmetic and/or trivial sync up with i386.
Approved by:  re (rwatson)
2003-11-21 03:02:00 +00:00
Peter Wemm
b4bae2b0c5 Argh! Followup to previous commit. I checked in the patch with an
unintended local change.  Change Xurthread back to curthread.
2003-11-20 23:49:28 +00:00
Peter Wemm
5dd883833c Provide a streamlined '#define curthread __curthread()' for amd64 to avoid
the compiler having to parse and optimize the PCPU_GET(curthread) so often.
__curthread() is an inline optimized version of PCPU_GET(curthread) that
knows that pc_curthread is at offset zero in the pcpu struct.  Add a
CTASSERT() to catch any possible changes to this.  This accounts for
just over a 1% wall clock speedup for total kernel compile/link time,
and 20% compile time speedup on some specific files depending on which
compile options are used.

Approved by:  re (jhb)
2003-11-20 22:54:44 +00:00
Peter Wemm
0d2a298904 Initial landing of SMP support for FreeBSD/amd64.
- This is heavily derived from John Baldwin's apic/pci cleanup on i386.
- I have completely rewritten or drastically cleaned up some other parts.
  (in particular, bootstrap)
- This is still a WIP.  It seems that there are some highly bogus bioses
  on nVidia nForce3-150 boards.  I can't stress how broken these boards
  are.  I have a workaround in mind, but right now the Asus SK8N is broken.
  The Gigabyte K8NPro (nVidia based) is also mind-numbingly hosed.
- Most of my testing has been with SCHED_ULE.  SCHED_4BSD works.
- the apic and acpi components are 'standard'.
- If you have an nVidia nForce3-150 board, you are stuck with 'device
  atpic' in addition, because they somehow managed to forget to connect the
  8254 timer to the apic, even though its in the same silicon!  ARGH!
  This directly violates the ACPI spec.
2003-11-17 08:58:16 +00:00
Bruce Evans
6a0d1abc5d Fixed pedantic warnings for statement-expressions using __extension__
and by not using a statement-expression for the non-expression
__PCPU_SET().
2003-11-17 04:40:58 +00:00
Bruce Evans
81bbee5996 Fixed a pedantic syntax error (a stray semicolon at the end of
PCPU_MD_FIELDS).
2003-11-17 03:40:41 +00:00
Alan Cox
e45db9b837 - Modify alpha's sf_buf implementation to use the direct virtual-to-
physical mapping.
 - Move the sf_buf API to its own header file; make struct sf_buf's
   definition machine dependent.  In this commit, we remove an
   unnecessary field from struct sf_buf on the alpha, amd64, and ia64.
   Ultimately, we may eliminate struct sf_buf on those architecures
   except as an opaque pointer that references a vm page.
2003-11-16 06:11:26 +00:00
Nate Lawson
b72e9cf526 Add the pc_acpi_id PCPU member. The new acpi_cpu driver uses this to
dereference the softc.
2003-11-15 18:58:29 +00:00
Peter Wemm
1f6c75db0b Preemptively burn a bridges. The isa timer code is likely to be
replaced by the HPET timer at some point, so dont even make a release
with the aquire/release_timer0 functions.
2003-11-14 22:34:43 +00:00
Peter Wemm
7b66b81ee4 Convert a couple of pointers to integers for source compatability with
amd64.
2003-11-14 22:23:30 +00:00
Peter Wemm
40e3826a9f Whitespace nit (sorry, couldn't help it) 2003-11-14 22:21:30 +00:00
John Baldwin
3ab2ba59f4 Shuffle the APIC interrupt vectors around a bit:
- Move the IPI and local APIC interrupt vectors up into the 0xf0 - 0xff
  range.  The pmap lazyfix IPI was reordered down next to the TLB
  shootdowns to avoid conflicting with the spurious interrupt vector.
- Move the base of APIC interrupts up 16 so that the first 16 APIC
  interrupts do not overlap the vectors used by the ATPIC.
- Remove bogus interrupt vector reservations for LINT[01].
- Now that 0xc0 - 0xef are available, use them for device interrupts.
  This increases the number of APIC device interrupts to 191.
- Increase the system-wide number of global interrupts to 191 to catch up
  to more APIC interrupts.

Requested by:	peter (2)
2003-11-14 19:10:13 +00:00
John Baldwin
69487322d8 Fix a typo. 2003-11-13 16:41:07 +00:00
John Baldwin
bd9cd7e3f7 - Move manipulation of td_intr_nesting_level out of assembly interrupt
vector stubs and into the C functions they call.
- Move disabling and EOIing of interrupt sources out of PIC driver entry
  points and into intr_execute_handlers().  Intr_execute_handlers() only
  disables a source for an interrupt if it is a stray interrupt or has
  threaded handlers.  Sources with fast handlers no longer disable (mask)
  the source while executing the handlers.
- Move the setting of clkintr_pending into intr_execute_handlers() and set
  the variable for any interrupt source with a vector of 0.  (Should only
  be true for IRQ 0.)  This fixes clkintr_pending in the NO_MIXED_MODE
  case.
- Implement lapic_eoi() and use it to implement ioapic_eoi_source().
- Rename atpic_sched_ithd() to atpic_handle_intr() since it is used to
  handle all atpic interrupts and not just threaded ones.

Inspired by:	peter's changes to amd64 in p4 (1)
Requested by:	bde (2)
2003-11-12 18:13:57 +00:00
Peter Wemm
fcfe57d640 Update the graffiti. 2003-11-08 04:39:22 +00:00
Peter Wemm
398dbb11d8 Switch from having a fpu "device" to something that is more like the
integrated part of the cpu core that it is.
2003-11-08 04:37:54 +00:00
Peter Wemm
bf2f09ee97 The great s/npx/fpu/gi 2003-11-08 03:33:38 +00:00
Peter Wemm
8b2454d833 Rename npx* to fpu*. I haven't done the flags/function names yet. 2003-11-08 02:39:46 +00:00
Scott Long
eb3b7bf69f Document the lockfunc and lockfuncarg arguments to bus_dma_tag_create() in
the busdma headers.
2003-11-07 23:29:42 +00:00
John Baldwin
8f8914ad98 Add the MP Table APIC enumerator. This code uses the BIOS MP Table to
enumerate I/O APICs as well as local APICs.  It also provides Host-PCI
and PCI-PCI bridge drivers to use the MP Table to route PCI interrupts.
2003-11-03 22:12:37 +00:00
John Baldwin
6f92bdd0c1 New APIC support code:
- The apic interrupt entry points have been rewritten so that each entry
  point can serve 32 different vectors.  When the entry is executed, it
  uses one of the 32-bit ISR registers to determine which vector in its
  assigned range was triggered.  Thus, the apic code can support 159
  different interrupt vectors with only 5 entry points.
- We now always to disable the local APIC to work around an errata in
  certain PPros and then re-enable it again if we decide to use the APICs
  to route interrupts.
- We no longer map IO APICs or local APICs using special page table
  entries.  Instead, we just use pmap_mapdev().  We also no longer
  export the virtual address of the local APIC as a global symbol to
  the rest of the system, but only in local_apic.c.  To aid this, the
  APIC ID of each CPU is exported as a per-CPU variable.
- Interrupt sources are provided for each intpin on each IO APIC.
  Currently, each source is given a unique interrupt vector meaning that
  PCI interrupts are not shared on most machines with an I/O APIC.
  That mapping for interrupt sources to interrupt vectors is up to the
  APIC enumerator driver however.
- We no longer probe to see if we need to use mixed mode to route IRQ 0,
  instead we always use mixed mode to route IRQ 0 for now.  This can be
  disabled via the 'NO_MIXED_MODE' kernel option.
- The npx(4) driver now always probes to see if a built-in FPU is present
  since this test can now be performed with the new APIC code.  However,
  an SMP kernel will panic if there is more than one CPU and a built-in
  FPU is not found.
- PCI interrupts are now properly routed when using APICs to route
  interrupts, so remove the hack to psuedo-route interrupts when the
  intpin register was read.
- The apic.h header was moved to apicreg.h and a new apicvar.h header
  that declares the APIs used by the new APIC code was added.
2003-11-03 21:53:38 +00:00
John Baldwin
ecee5704ed New device interrupt code. This defines an interrupt source abstraction
that provides methods via a PIC driver to do things like mask a source,
unmask a source, enable it when the first interrupt handler is added, etc.
The interrupt code provides a table of interrupt sources indexed by IRQ
numbers, or vectors.  These vectors are what new-bus uses for its IRQ
resources and for bus_setup_intr()/bus_teardown_intr().  The interrupt
code then maps that vector a given interrupt source object.  When an
interrupt comes in, the low-level interrupt code looks up the interrupt
source for the source that triggered the interrupt and hands it off to
this code to execute the appropriate handlers.

By having an interrupt source abstraction, this allows us to have different
types of interrupt source providers within the shared IRQ address space.
For example, IRQ 0 may map to pin 0 of the master 8259A PIC, IRQs 1
through 60 may map to pins on various I/O APICs, and IRQs 120 through
128 may map to MSI interrupts for various PCI devices.
2003-11-03 21:25:52 +00:00
John Baldwin
63239aa581 Always export r_gdt and r_idt and give them extern declarations in
machine/segments.h.
2003-10-30 21:42:17 +00:00
John Baldwin
07930cce05 A few whitespace and comment tweaks. 2003-10-24 21:02:26 +00:00
Peter Wemm
cedb3695c1 Add __va_copy and make it always visible, in spite of the __ISO_C_VISIBLE
setting.  Make va_copy be an alias if __ISO_C_VISIBLE >= 1999.

Why?  more than a few ports have an autoconf that looks for __va_copy
because it is available on glibc.  It is critical that we use it if
at all possible on amd64.  It generally isn't a problem for i386 and its
ilk because autoconf driven code tends to fall back to an assignment.
2003-10-24 02:50:39 +00:00
Peter Wemm
63f2bb5ff1 Use a more robust API altogether for the amd64_get_fsbase() etc functions. 2003-10-23 06:06:14 +00:00
Peter Wemm
c0432d033e Renumber the sysarch vectors for amd64 specific syscalls so that I can
implement i386 compat numbers where it makes sense.  This would save a
syscall translation layer.  Yes, this breaks the abi slightly again, but
fortunately its just a recompile rather than tweaking the source.  I will
be fixing the libc stubs while I'm here.
2003-10-23 05:31:23 +00:00
Peter Wemm
19acc770c2 Pull the tier-2 card one last time and break the get/setcontext and
sigreturn() ABI and the signal context on the stack.

Make the trapframe (and its shadows in the ucontext and sigframe etc)
8 bytes larger in order to preserve 16 byte stack alignment for the
following C code calls.  I could have done some padding after the
trapframe was saved, but some of the C code still expects an argument of
'struct trapframe'.  Anyway, this gives me a spare field that can be used
to store things like 'partial trapframe' status or something else in
the future.

The runtime impact is fairly small, *except* for threaded apps and things
that decode contexts and the signal stack (eg: cvsup binary).  Signal
delivery isn't too badly affected because the kernel generates the
sigframe that sigreturn uses after the handler has been called.

The size of mcontext_t and struct sigframe hasn't changed.  Only
the last few fields (sc_eip etc) got moved a little and I eliminated
a spare field.  mc_len/sc_len did change location though so the
sanity checks there will still trap it.
2003-10-15 02:04:52 +00:00
Bruce M Simpson
2bc7dd5661 Move pmap_resident_count() from the MD pmap.h to the MI pmap.h.
Add a definition of pmap_wired_count().
Add a definition of vmspace_wired_count().

Reviewed by:	truckman
Discussed with:	peter
2003-10-06 01:47:12 +00:00
Peter Wemm
6ccf265bb0 Commit Bosko's patch to clean up the PSE/PG_G initialization to and
avoid problems with some Pentium 4 cpus and some older PPro/Pentium2
cpus.  There are several problems, some documented in Intel errata.
This patch:
1) moves the kernel to the second page in the PSE case.  There is an
errata that says that you Must Not point a 4MB page at physical
address zero on older cpus.  We avoided bugs here due to sheer luck.
2) sets up PSE page tables right from the start in locore, rather than
trying to switch from 4K to 4M (or 2M) pages part way through the boot
sequence at the same time that we're messing with PG_G.

For some reason, the pmap work over the last 18 months seems to tickle
the problems, and the PAE infrastructure changes disturb the cpu
bugs even more.

A couple of people have reported a problem with APM bios calls during
boot.  I'll work with people to get this resolved.

Obtained from:	bmilekic
2003-10-01 23:46:08 +00:00
Peter Wemm
a93020d7a1 Use __register_t instead of register_t, otherwise <sys/types.h> is a
prerequisite for <ucontext.h> on amd64.  Oops.
2003-10-01 01:08:04 +00:00
Peter Wemm
ec548f97fc MFi386: BURN_BRIDGES around timer0 functions 2003-09-30 06:38:11 +00:00
Alan Cox
9060731130 Eliminate the pte object. 2003-09-27 20:53:01 +00:00
Peter Wemm
cc3112f108 Re-raise the default datasize and stacksize now that the 32 bit exec
support can clip it to sensible values.
2003-09-25 01:11:17 +00:00
Peter Wemm
c460ac3a00 Add sysentvec->sv_fixlimits() hook so that we can catch cases on 64 bit
systems where the data/stack/etc limits are too big for a 32 bit process.

Move the 5 or so identical instances of ELF_RTLD_ADDR() into imgact_elf.c.

Supply an ia32_fixlimits function.  Export the clip/default values to
sysctl under the compat.ia32 heirarchy.

Have mmap(0, ...) respect the current p->p_limits[RLIMIT_DATA].rlim_max
value rather than the sysctl tweakable variable.  This allows mmap to
place mappings at sensible locations when limits have been reduced.

Have the imgact_elf.c ld-elf.so.1 placement algorithm use the same
method as mmap(0, ...) now does.

Note that we cannot remove all references to the sysctl tweakable
maxdsiz etc variables because /etc/login.conf specifies a datasize
of 'unlimited'.  And that causes exec etc to fail since it can no
longer find space to mmap things.
2003-09-25 01:10:26 +00:00
Yoshihiro Takahashi
33e38a2cc8 Implement the bus_space_map() function to allocate resources and initialize
a bus_handle, but currently it does only initializing a bus_handle.
2003-09-23 08:22:34 +00:00
Peter Wemm
725bc17312 Oops. back out last commit. The data and stack limits are used by the
32 bit binary stuff.  32 bit binaries do not like it much when the kernel
tries hard to put things above the 8GB mark.

I have a work-in-progress to fix this properly, but I didn't want to burn
anybody with this yet.
2003-09-23 03:20:34 +00:00
Peter Wemm
cd3402fa66 Sync with i386 version. The quality initialization was missing and some
other junk.
2003-09-23 00:18:45 +00:00
Peter Wemm
4295ddf26f MFi386 pci_bus.c 1.102 legacyvar.h 1.4: rename nexus_pcib to legacy_pcib
However, leave legacy_pcib_route_interrupt() since there is no pcibios to
call.
2003-09-23 00:03:44 +00:00
Peter Wemm
da87d7e10d Move basemem variable into global scope so that the MP startup code can
refer to it for looking for tables.
2003-09-22 23:33:29 +00:00
Peter Wemm
24789c549a Increase the default data size limit from 512MB to 8GB. Increase default
stack limit from 64MB to 512MB.
2003-09-22 23:21:39 +00:00
Peter Wemm
d79ddbf5de MFi386 machdep.c rev 1.201, clock.c 1.201, clock.h 1.45 by phk: Dont
initialize a TSC timecounter until we know if it is broke or not.

XXX I think there is a bug in the i386 code here.  init_TSC_tc() comes
after:
  if (statclock_disable)
    return;

ie: if you turn off the statclock interrupt, you dont get the TSC either.
2003-09-22 23:02:24 +00:00
Peter Wemm
13a27f2962 MFi386 rev 1.25 by jhb: add new MSR's and some missing older ones and
APICBASE MSR constants.
2003-09-22 22:51:46 +00:00
Peter Wemm
d10e66f073 MFi386 rev 1.37: constant-friendly bswap macros 2003-09-22 22:37:49 +00:00
Peter Wemm
5bc82d1ce1 MFi386: pci_cfgreg.h rev 1.10 by jhb/des/njl. Fix CONF1_ENABLE_MSK. 2003-09-22 22:21:21 +00:00
Peter Wemm
8848ad863b MFi386 by jhb: add acpi_SetDefaultIntrModel(); 2003-09-22 22:12:46 +00:00
Peter Wemm
76caec589f MFi386 by jhb: use symbolic constants for the IDT entries. 2003-09-22 22:09:02 +00:00