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3543 Commits

Author SHA1 Message Date
John Baldwin
215e7c161a Rework how we wire up interrupt sources to CPUs:
- Throw out all of the logical APIC ID stuff.  The Intel docs are somewhat
  ambiguous, but it seems that the "flat" cluster model we are currently
  using is only supported on Pentium and P6 family CPUs.  The other
  "hierarchy" cluster model that is supported on all Intel CPUs with
  local APICs is severely underdocumented.  For example, it's not clear
  if the OS needs to glean the topology of the APIC hierarchy from
  somewhere (neither ACPI nor MP Table include it) and setup the logical
  clusters based on the physical hierarchy or not.  Not only that, but on
  certain Intel chipsets, even though there were 4 CPUs in a logical
  cluster, all the interrupts were only sent to one CPU anyway.
- We now bind interrupts to individual CPUs using physical addressing via
  the local APIC IDs.  This code has also moved out of the ioapic PIC
  driver and into the common interrupt source code so that it can be
  shared with MSI interrupt sources since MSI is addressed to APICs the
  same way that I/O APIC pins are.
- Interrupt source classes grow a new method pic_assign_cpu() to bind an
  interrupt source to a specific local APIC ID.
- The SMP code now tells the interrupt code which CPUs are avaiable to
  handle interrupts in a simpler and more intuitive manner.  For one thing,
  it means we could now choose to not route interrupts to HT cores if we
  wanted to (this code is currently in place in fact, but under an #if 0
  for now).
- For now we simply do static round-robin of IRQs to CPUs when the first
  interrupt handler just as before, with the change that IRQs are now
  bound to individual CPUs rather than groups of up to 4 CPUs.
- Because the IRQ to CPU mapping has now been moved up a layer, it would
  be easier to manage this mapping from higher levels.  For example, we
  could allow drivers to specify a CPU affinity map for their interrupts,
  or we could allow a userland tool to bind IRQs to specific CPUs.

The MFC is tentative, but I want to see if this fixes problems some folks
had with UP APIC kernels on 6.0 on SMP machines (an SMP kernel would work
fine, but a UP APIC kernel (such as GENERIC in RELENG_6) would lose
interrupts).

MFC after:	1 week
2006-02-28 22:24:55 +00:00
Poul-Henning Kamp
8c92c2096d Use ttyalloc() instead of ttymalloc() 2006-01-04 09:46:20 +00:00
John Baldwin
b439e431bf Tweak how the MD code calls the fooclock() methods some. Instead of
passing a pointer to an opaque clockframe structure and requiring the
MD code to supply CLKF_FOO() macros to extract needed values out of the
opaque structure, just pass the needed values directly.  In practice this
means passing the pair (usermode, pc) to hardclock() and profclock() and
passing the boolean (usermode) to hardclock_cpu() and hardclock_process().
Other details:
- Axe clockframe and CLKF_FOO() macros on all architectures.  Basically,
  all the archs were taking a trapframe and converting it into a clockframe
  one way or another.  Now they can just extract the PC and usermode values
  directly out of the trapframe and pass it to fooclock().
- Renamed hardclock_process() to hardclock_cpu() as the latter is more
  accurate.
- On Alpha, we now run profclock() at hz (profhz == hz) rather than at
  the slower stathz.
- On Alpha, for the TurboLaser machines that don't have an 8254
  timecounter, call hardclock() directly.  This removes an extra
  conditional check from every clock interrupt on Alpha on the BSP.
  There is probably room for even further pruning here by changing Alpha
  to use the simplified timecounter we use on x86 with the lapic timer
  since we don't get interrupts from the 8254 on Alpha anyway.
- On x86, clkintr() shouldn't ever be called now unless using_lapic_timer
  is false, so add a KASSERT() to that affect and remove a condition
  to slightly optimize the non-lapic case.
- Change prototypeof  arm_handler_execute() so that it's first arg is a
  trapframe pointer rather than a void pointer for clarity.
- Use KCOUNT macro in profclock() to lookup the kernel profiling bucket.

Tested on:	alpha, amd64, arm, i386, ia64, sparc64
Reviewed by:	bde (mostly)
2005-12-22 22:16:09 +00:00
Peter Wemm
737429bc96 MFamd64 rev 1.223: Use the TSC to implement DELAY() if not marked broken
and it has been calibrated.
2005-12-13 19:08:55 +00:00
John Baldwin
47d65ba4d0 Whitespace: reduce diffs with amd64. 2005-12-08 18:33:48 +00:00
John Baldwin
2dce95a085 Change the i386 code to pass the interrupt vector as a separate argument
rather than embedding it in the intrframe as if_vec.  This reduces diffs
with amd64 somewhat.
- Remove cf_vec from clockframe (it wasn't used anyway) and stop pushing
  dummy vector arguments for ipi_bitmap_handler() and lapic_handle_timer()
  since clockframe == trapframe now.
- Fix ddb to handle stack traces across interrupt entry points that just
  have a trapframe on their stack and not a trapframe + vector.
- Change intr_execute_handlers() to take a trapframe rather than an
  intrframe pointer.
- Change lapic_handle_intr() and atpic_handle_intr() to take a vector and
  trapframe rather than an intrframe.
- GC struct intrframe now that nothing uses it anymore.
- GC CLOCK_TO_TRAPFRAME() and INTR_TO_TRAPFRAME().

Reviewed by:	bde
Requested by:	peter
2005-12-05 22:39:09 +00:00
John Baldwin
ac7326e338 Don't panic if IRQ 13 doesn't exist. On some machines (see previous
commit to atpic.c) there may not be an IRQ 13.  Instead, just keep going.
If the INT16 interface doesn't work then we will eventually panic anyway.

FWIW: We could probably just axe the support for IRQ 13 altogether at this
point.  The only thing we'd lose support for are 486sx systems with
external 487 FPUs.

MFC after:	1 week
2005-12-05 22:11:44 +00:00
John Baldwin
5ae84c09e7 Really slam the door on mixed mode now that we don't depend on it for a
working IRQ0 with APIC anymore.  Previously, it was possible to have
some other ATPIC IRQS "leak" through in a few edge cases.  For example, on
my x86 test machine, ACPI re-routes the SCI (IRQ 9) to intpin 13 on the
first I/O APIC.  This leaves a hole for IRQ 13 (since the APIC doesn't
provide a source for IRQ 13 in that case) with the result that the ATPIC
IRQ13 source was registered instead.  This changes the 8259A drivers to
only register their interrupt sources if none of the 16 ISA IRQs have an
interrupt source already installed.

MFC after:	1 week
2005-12-05 22:09:30 +00:00
John Baldwin
48c8cbcb82 - Move PUSH_FRAME and POP_FRAME into machine/asmacros.h.
- Add a new SET_KERNEL_SREGS macro that sets up %ds and %es to point to
  kernel data and %fs to point to per-CPU data and use the new macro
  in several kernel entry points including trap and interrupt handlers.
- Convert the IPI_STOP handler Xcpustop to push a standard trap frame
  rather than an application frame.
- Make the TRAP() macro private to exception.s since it is only used
  there.
- Move the PCPU_*() macros in asmacros.h out of the middle of the
  profiling macros.

Reviewed by:	bde
Requested by:	bde (4, 5)
2005-12-05 21:44:47 +00:00
Ruslan Ermilov
342ed5d948 Fix -Wundef warnings found when compiling i386 LINT, GENERIC and
custom kernels.
2005-12-05 11:58:35 +00:00
Ruslan Ermilov
6d8200ff0c Add /dev/speaker support to amd64.
The following repo-copies were made (by Mark Murray):

sys/i386/isa/spkr.c -> sys/dev/speaker/spkr.c
sys/i386/include/speaker.h -> sys/dev/speaker/speaker.h
share/man/man4/man4.i386/spkr.4 -> share/man/man4/spkr.4
2005-11-11 09:57:32 +00:00
Warner Losh
51ef421d92 Add support for XBOX to the FreeBSD port. The xbox architecture is
nearly identical to wintel/ia32, with a couple of tweaks.  Since it is
so similar to ia32, it is optionally added to a i386 kernel.  This
port is preliminary, but seems to work well.  Further improvements
will improve the interaction with syscons(4), port Linux nforce driver
and future versions of the xbox.

This supports the 64MB and 128MB boxes.  You'll need the most recent
CVS version of Cromwell (the Linux BIOS for the XBOX) to boot.

Rink will be maintaining this port, and is interested in feedback.
He's setup a website http://xbox-bsd.nl to report the latest
developments.

Any silly mistakes are my fault.

Submitted by: Rink P.W. Springer rink at stack dot nl and
	Ed Schouten ed at fxq dot nl
2005-11-09 03:55:40 +00:00
Joerg Wunsch
9b229abc8f Finally complete some work on generalizing the PCF8584-based I2C
drivers I started quite some time before.

Retire the old i386-only pcf driver, and activate the new general
driver that has been sitting in the tree already for quite some
time.

Build the i2c modules for sparc64 architectures as well (where I've
been developing all this on).
2005-10-28 15:58:19 +00:00
John Baldwin
e0f66ef861 Reorganize the interrupt handling code a bit to make a few things cleaner
and increase flexibility to allow various different approaches to be tried
in the future.
- Split struct ithd up into two pieces.  struct intr_event holds the list
  of interrupt handlers associated with interrupt sources.
  struct intr_thread contains the data relative to an interrupt thread.
  Currently we still provide a 1:1 relationship of events to threads
  with the exception that events only have an associated thread if there
  is at least one threaded interrupt handler attached to the event.  This
  means that on x86 we no longer have 4 bazillion interrupt threads with
  no handlers.  It also means that interrupt events with only INTR_FAST
  handlers no longer have an associated thread either.
- Renamed struct intrhand to struct intr_handler to follow the struct
  intr_foo naming convention.  This did require renaming the powerpc
  MD struct intr_handler to struct ppc_intr_handler.
- INTR_FAST no longer implies INTR_EXCL on all architectures except for
  powerpc.  This means that multiple INTR_FAST handlers can attach to the
  same interrupt and that INTR_FAST and non-INTR_FAST handlers can attach
  to the same interrupt.  Sharing INTR_FAST handlers may not always be
  desirable, but having sio(4) and uhci(4) fight over an IRQ isn't fun
  either.  Drivers can always still use INTR_EXCL to ask for an interrupt
  exclusively.  The way this sharing works is that when an interrupt
  comes in, all the INTR_FAST handlers are executed first, and if any
  threaded handlers exist, the interrupt thread is scheduled afterwards.
  This type of layout also makes it possible to investigate using interrupt
  filters ala OS X where the filter determines whether or not its companion
  threaded handler should run.
- Aside from the INTR_FAST changes above, the impact on MD interrupt code
  is mostly just 's/ithread/intr_event/'.
- A new MI ddb command 'show intrs' walks the list of interrupt events
  dumping their state.  It also has a '/v' verbose switch which dumps
  info about all of the handlers attached to each event.
- We currently don't destroy an interrupt thread when the last threaded
  handler is removed because it would suck for things like ppbus(8)'s
  braindead behavior.  The code is present, though, it is just under
  #if 0 for now.
- Move the code to actually execute the threaded handlers for an interrrupt
  event into a separate function so that ithread_loop() becomes more
  readable.  Previously this code was all in the middle of ithread_loop()
  and indented halfway across the screen.
- Made struct intr_thread private to kern_intr.c and replaced td_ithd
  with a thread private flag TDP_ITHREAD.
- In statclock, check curthread against idlethread directly rather than
  curthread's proc against idlethread's proc. (Not really related to intr
  changes)

Tested on:	alpha, amd64, i386, sparc64
Tested on:	arm, ia64 (older version of patch by cognet and marcel)
2005-10-25 19:48:48 +00:00
Marius Strobl
b7c96c0d0b Add a font width argument to vi_load_font_t, vi_save_font_t and vi_putm_t
and do some preparations for handling 12x22 fonts (currently lots of code
implies and/or hardcodes a font width of 8 pixels). This will be required
on sparc64 which uses a default font size of 12x22 in order to add font
loading and saving support as well as to use a syscons(4)-supplied mouse
pointer image.
This API breakage is committed now so it can be MFC'ed in time for 6.0
and later on upcoming framebuffer drivers destined for use on sparc64
and which are expected to rely on using font loading internally and on
a syscons(4)-supplied mouse pointer image can be easily MFC'ed to
RELENG_6 rather than requiring a backport.

Tested on:	i386, sparc64, make universe
MFC after:	1 week
2005-09-28 14:54:07 +00:00
Poul-Henning Kamp
5d3ea8713c __RMAN_RESOURCE_VISIBLE not necessary. 2005-09-25 20:21:48 +00:00
John Baldwin
721be80c83 Remove the el(4) driver for 3Com 3c501 ISA NICs from HEAD as threatened
earlier as no one has stepped up to test recent changes to the driver.
Oddly, the module was actually turned on on ia64 though I'm fairly certain
that no ia64 machine has ever had or will ever have an ISA slot.

Axe borrowed from:	phk
2005-08-26 13:42:04 +00:00
John Baldwin
c98ae70c21 Fix locking in el(4) and mark mpsafe.
- Add locked variants of el_init and el_start.
- Don't initialize the mutex and lock it during el_probe().
- Do initialize the mutex during attach.  (el_probe() did destroy the mutex
  to cleanup, so this meant the driver was always using a destroyed mutex
  when it was running.)
- Setup the interrupt handler after ether_ifattach().
- Fix locking in el_detach() and el_ioctl().

Note: Since I couldn't actually find anyone with this hardware, I'm going
ahead and committing these changes so they won't be lost.  I'll remove the
driver in a week (real purpose of the MFC after below) unless someone pipes
up to test this.

MFC after:	1 week
Tested by:	gcc(1)
2005-08-17 17:36:47 +00:00
Robert Watson
13f4c340ae Propagate rename of IFF_OACTIVE and IFF_RUNNING to IFF_DRV_OACTIVE and
IFF_DRV_RUNNING, as well as the move from ifnet.if_flags to
ifnet.if_drv_flags.  Device drivers are now responsible for
synchronizing access to these flags, as they are in if_drv_flags.  This
helps prevent races between the network stack and device driver in
maintaining the interface flags field.

Many __FreeBSD__ and __FreeBSD_version checks maintained and continued;
some less so.

Reviewed by:	pjd, bz
MFC after:	7 days
2005-08-09 10:20:02 +00:00
John Baldwin
db015a9153 Fixup some more fallout from the lapic/i8254 changes:
- Make sure timer0_max_count is set to a correct value in the lapic case.
- Revert i8254_restore() to explicitly reprogram timer 0 rather than
  calling set_timer_freq() to do it.  set_timer_freq() only reprograms
  the counter if the max count changes which it never does on resume.  This
  unbreaks suspend/resume for several people.

Tested by:	marks, others
Reviewed by:	bde
MFC after:	3 days
2005-07-13 15:43:21 +00:00
John Baldwin
623b1a868e Remove a || 1 that crept into the i8254 commit and was subsequently
copied and pasted.  I had actually tested without this change in my
trees as had the other testers.

Reported by:	bde, Rostislav Krasny rosti dot bsd at gmail dot com
Approved by:	re (scottl)
Pointy hat to:	jhb
2005-07-05 20:13:12 +00:00
Xin LI
60baed3742 Remove the CPU_ENABLE_SSE option from the i386 and pc98 architectures,
as they are already default for I686_CPU for almost 3 years, and
CPU_DISABLE_SSE always disables it.  On the other hand, CPU_ENABLE_SSE
does not work for I486_CPU and I586_CPU.

This commit has:
	- Removed the option from conf/options.*
	- Removed the option and comments from MD NOTES files
	- Simplified the CPU_ENABLE_SSE ifdef's so they don't
	  deal with CPU_ENABLE_SSE from kernel configuration. (*)

For most users, this commit should be largely no-op.  If you used to
place CPU_ENABLE_SSE into your kernel configuration for some reason,
it is time to remove it.

(*) The ifdef's of CPU_ENABLE_SSE are not removed at this point, since
    we need to change it to !defined(CPU_DISABLE_SSE) && defined(I686_CPU),
    not just !defined(CPU_DISABLE_SSE), if we really want to do so.

Discussed on:	-arch
Approved by:	re (scottl)
2005-07-02 20:06:44 +00:00
John Baldwin
7df0015945 Use a simpler implementation for the i8254 timecounter when using the lapic
timer since irq0 isn't being driven at hz in that case and we don't need to
try to handle edge cases with rollover, etc. that require irq0 to be firing
for the timecounter to actually work.

Submitted by:	phk
Tested by:	schweikh
Approved by:	re (scottl)
2005-07-01 15:47:27 +00:00
Marius Strobl
520b635320 - Hook up the new locations of the atkbdc(4), atkbd(4) and psm(4) source
files after they were repo-copied to sys/dev/atkbdc. The sources of
  atkbdc(4) and its children were moved to the new location in preparation
  for adding an EBus front-end to atkbdc(4) for use on sparc64; i.e. in
  order to not further scatter them over the whole tree which would have
  been the result of adding atkbdc_ebus.c in e.g. sys/sparc64/ebus. Another
  reason for the repo-copies was that some of the sources were misfiled,
  e.g. sys/isa/atkbd_isa.c wasn't ISA-specific at all but for hanging
  atkbd(4) off of atkbdc(4) and was renamed to atkbd_atkbdc.c accordingly.
  Most of sys/isa/psm.c, i.e. expect for its PSMC PNP part, also isn't
  ISA-specific.
- Separate the parts of atkbdc_isa.c which aren't actually ISA-specific
  but are shareable between different atkbdc(4) bus front-ends into
  atkbdc_subr.c (repo-copied from atkbdc_isa.c). While here use
  bus_generic_rl_alloc_resource() and bus_generic_rl_release_resource()
  respectively in atkbdc_isa.c instead of rolling own versions.
- Add sparc64 MD bits to atkbdc(4) and atkbd(4) and an EBus front-end for
  atkbdc(4). PS/2 controllers and input devices are used on a couple of
  Sun OEM boards and occur on either the EBus or the ISA bus. Depending on
  the board it's either the only on-board mean to connect a keyboard and
  mouse or an alternative to either RS232 or USB devices.
- Wrap the PSMC PNP part of psm.c in #ifdef DEV_ISA so it can be compiled
  without isa(4) (e.g. for EBus-only machines). This ISA-specific part
  isn't separated into its own source file, yet, as it requires more work
  than was feasible for 6.0 in order to do it in a clean way. Actually
  philip@ is working on a rewrite of psm(4) so a more comprehensive
  clean-up and separation of hardware dependent and independent parts is
  expected to happen after 6.0.

Tested on:	i386, sparc64 (AX1105, AXe and AXi boards)
Reviewed by:	philip
2005-06-10 20:56:38 +00:00
Brooks Davis
fc74a9f93a Stop embedding struct ifnet at the top of driver softcs. Instead the
struct ifnet or the layer 2 common structure it was embedded in have
been replaced with a struct ifnet pointer to be filled by a call to the
new function, if_alloc(). The layer 2 common structure is also allocated
via if_alloc() based on the interface type. It is hung off the new
struct ifnet member, if_l2com.

This change removes the size of these structures from the kernel ABI and
will allow us to better manage them as interfaces come and go.

Other changes of note:
 - Struct arpcom is no longer referenced in normal interface code.
   Instead the Ethernet address is accessed via the IFP2ENADDR() macro.
   To enforce this ac_enaddr has been renamed to _ac_enaddr.
 - The second argument to ether_ifattach is now always the mac address
   from driver private storage rather than sometimes being ac_enaddr.

Reviewed by:	sobomax, sam
2005-06-10 16:49:24 +00:00
John Baldwin
e2d8b255c9 Allow the VESA code to handle devices that don't claim to be VGA devices.
This fixes VESA support when running under vmware.

PR:		i386/81445
Submitted by:	Jia-Shiun Li jiashiun at gmail dot com
MFC after:	1 week
2005-06-01 16:02:39 +00:00
Yoshihiro Takahashi
d4fcf3cba5 Remove bus_{mem,p}io.h and related code for a micro-optimization on i386
and amd64.  The optimization is a trivial on recent machines.

Reviewed by:	-arch (imp, marcel, dfr)
2005-05-29 04:42:30 +00:00
Nate Lawson
b3a9f68f8c Fix LINT build, original breakage was rev 1.23. There are 2 definitions
of MCOUNT to have a C version and an asm version with the same name and
not have LOCORE ifdefs to distinguish them.  <machine/profile.h> provides
a C version and <machine/asmacros.h> provides an assembler version.

Discussed with:	bde
2005-05-20 17:16:24 +00:00
Nate Lawson
c363ab2430 Fix low res profiling kernel build. Move two defines to collapse the
#ifdef GUPROF case.
2005-05-19 05:22:52 +00:00
Yoshihiro Takahashi
b22bf66063 - Move bus dependent defines to {isa,cbus}_dmareg.h.
- Use isa/isareg.h rather than <arch>/isa/isa.h.

Tested on: i386, pc98
2005-05-14 10:14:56 +00:00
Yoshihiro Takahashi
24072ca35b - Move timerreg.h to <arch>/include and split i8253 specific defines into
i8253reg.h, and add some defines to control a speaker.
- Move PPI related defines from i386/isa/spkr.c into ppireg.h and use them.
- Move IO_{PPI,TIMER} defines into ppireg.h and timerreg.h respectively.
- Use isa/isareg.h rather than <arch>/isa/isa.h.

Tested on: i386, pc98
2005-05-14 09:10:02 +00:00
Yoshihiro Takahashi
164e09ddb4 - Move the NPX_DEBUG option to options.{i386,pc98} and use opt_npx.h.
- Move npx related defines to {i386,pc98}/include/npx.h to remove #include
  {isa,cbus}.h.
2005-05-12 12:47:41 +00:00
Yoshihiro Takahashi
257d63789e - Move lptreg.h into pc98/cbus and rename to olptreg.h.
- Remove ifdef pc98.
2005-05-10 12:30:30 +00:00
Yoshihiro Takahashi
d1725ef7ff Change a directory layout for pc98.
- Move MD files into <arch>/<arch>.
  - Move bus dependent files into <arch>/<bus>.
Rename some files to more suitable names.

Repo-copied by:	peter
Discussed with:	imp
2005-05-10 12:02:18 +00:00
Yoshihiro Takahashi
b416ebde05 Move if_wl_i82586.h into sys/dev/wl. 2005-05-09 04:47:58 +00:00
Matthew N. Dodd
93fa9a8d72 Replace spl protection in rtcin() and writertc() with spinlocks
using the existing clock_lock mutex.
2005-04-12 20:49:31 +00:00
John Baldwin
d336ab43c6 - Don't enable periodic interrupts from the RTC by default in rtc_statusb.
Instead, explicitly enable them when we setup the interrupt handler.
  Also, move the setting of stathz and profhz down to the same place so
  that the code flow is simpler and easier to follow.
- Don't setup an interrupt handler for IRQ0 if we are using the lapic timer
  as it doesn't do anything productive in that case.
2005-03-24 21:34:16 +00:00
David Schultz
c513b0c567 Initialize the mxcsr properly, so the initial value in a process isn't
just the value that was left over from some other application.
2005-03-17 22:21:36 +00:00
Warner Losh
402f124a2b Eleminate 3 PC98 ifdefs:
o Use IP_NPX in preference to hard coded value to write 0 to clear busy#
o Use md macro for a full reset of the npx
o Use IRQ_NPX in preference to hard coded value for each platform.

# The other two ifdefs in this file are hard to remove
2005-03-16 20:46:16 +00:00
Warner Losh
8afd8dde0c Define IRQ_NPX for the irq used for the npx. Define macro for a full
reset of of npx, as appropriate for the platform.
2005-03-16 20:44:19 +00:00
Warner Losh
c276d9545b bus_alloc_resource must obey the same rules as
rman_resource_resournce_bound wrt end parameter.  The end parameter
here was the same as the start.  However, it should be start + count -
1, so make it that instead.
2005-03-16 20:31:46 +00:00
Peter Wemm
0cd202bb09 Whitespace sync with amd64. (Rather than re-add the extra blank lines
on amd64, I'm removing them here)
2005-03-11 22:10:25 +00:00
John Baldwin
dd1d2889f2 - Remove the BURN_BRIDGES marked support for hooking into the ISA timer 0
interrupt.
- Remove the timer_func variable as it now has a static value of
  hardclock() and is only used in one place.

Axe borrowed from:	phk
2005-03-09 15:33:58 +00:00
Ian Dowse
0626b13a16 Allocate and map a 12k data buffer such that it is contiguous in
both the kernel and vm86 virtual address spaces. Use this to increase
the maximum VESA save state size we can handle.
2005-03-04 00:53:03 +00:00
Joerg Wunsch
a5f50ef9e4 netchild's mega-patch to isolate compiler dependencies into a central
place.

This moves the dependency on GCC's and other compiler's features into
the central sys/cdefs.h file, while the individual source files can
then refer to #ifdef __COMPILER_FEATURE_FOO where they by now used to
refer to #if __GNUC__ > 3.1415 && __BARC__ <= 42.

By now, GCC and ICC (the Intel compiler) have been actively tested on
IA32 platforms by netchild.  Extension to other compilers is supposed
to be possible, of course.

Submitted by:	netchild
Reviewed by:	various developers on arch@, some time ago
2005-03-02 21:33:29 +00:00
Ian Dowse
325230b8b0 Reduce the maximum supported save state size to 4k, as the 8k limit
was not implemented correctly and needs further work.
2005-03-01 23:17:42 +00:00
Ian Dowse
ab16a51bbb Add a missing bcopy() to make saving the VESA state actually work.
Also save the DAC state, increase the maximum save state size from
4k to 8k, and refuse to save the VESA state if the BIOS reports it
is larger than the maximum size we can handle.

It doesn't appear that anything currently uses this code, but it
turns out to be capable of restoring some notebook displays to a
working state after a suspend-resume cycle.
2005-02-28 20:40:44 +00:00
Sam Leffler
937003c8b0 kill unused value
Noticed by:	Coverity Prevent analysis tool
2005-02-25 23:06:25 +00:00
Warner Losh
2f3ed70a98 Forced commit after moving mb86960.h from i386/isa/ic to dev/fe. It
is only used by the fe driver, and isn't MD.
2005-02-20 19:33:13 +00:00
John Baldwin
e8ce55117b Use the local APIC timer to drive the various kernel clocks on SMP machines
rather than forwarding interrupts from the clock devices around using IPIs:
- Add an IDT vector that pushes a clock frame and calls
  lapic_handle_timer().
- Add functions to program the local APIC timer including setting the
  divisor, and setting up the timer to either down a periodic countdown
  or one-shot countdown.
- Add a lapic_setup_clock() function that the BSP calls from
  cpu_init_clocks() to setup the local APIC timer if it is going to be
  used.  The setup uses a one-shot countdown to calibrate the timer.  We
  then program the timer on each CPU to fire at a frequency of hz * 3.
  stathz is defined as freq / 23 (hz * 3 / 23), and profhz is defined as
  freq / 2 (hz * 3 / 2).  This gives the clocks relatively prime divisors
  while keeping a low LCM for the frequency of the clock interrupts.
  Thanks to Peter Jeremy for suggesting this approach.
- Remove the hardclock and statclock forwarding code including the two
  associated IPIs.  The bitmap IPI handler has now effectively degenerated
  to just IPI_AST.
- When the local APIC timer is used we don't turn the RTC on at all, but
  we still enable interrupts on the ISA timer 0 (i8254) for timecounting
  purposes.
2005-02-08 20:25:07 +00:00