This is a workaround for the fact that the CFE is compiled as a 64-bit
application and therefore sets the SR_KX bit every time we call into
it (for e.g. console).
A TLB miss for any address above 0xc0000000 with the SR_KX bit set will
end up at the XTLB exception vector. We workaround this by copying the
standard TLB handler at the XTLB exception vector.
Approved by: imp (mentor)
symbols resolving in DDB
- When zeroing .bss/.sbss do not round end address to page boundary,
it's not neccessary and might destroy data pased by trampoline or
boot loader
interrupt sources feeding into a hardintr anymore. The
mips_mask_hard_irq() function does that for us while an interrupt is
being processed.
Submitted by: neel@
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
intr_machdep.c. This allows us to have an architecture dependant intr_machdep.c
(which we will need for RMI) in the machine specific directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
may need to look at finding a better place to put this. But first I want to
get this thing compiling.
