The cdevsw_add() function now finds the major number(s) in the
struct cdevsw passed to it. cdevsw_add_generic() is no longer
needed, cdevsw_add() does the same thing.
cdevsw_add() will print an message if the d_maj field looks bogus.
Remove nblkdev and nchrdev variables. Most places they were used
bogusly. Instead check a dev_t for validity by seeing if devsw()
or bdevsw() returns NULL.
Move bdevsw() and devsw() functions to kern/kern_conf.c
Bump __FreeBSD_version to 400006
This commit removes:
72 bogus makedev() calls
26 bogus SYSINIT functions
if_xe.c bogusly accessed cdevsw[], author/maintainer please fix.
I4b and vinum not changed. Patches emailed to authors. LINT
probably broken until they catch up.
chipset. First you thrilled to the 3c905, then you trembled at the
3c905B, now gaze in wonder at: the 3c905C! This appears to be another
3c90X series chip called the Tornado (PCI ID 0x10B7/0x9200) and should
be equivalent (from the driver API perspective) to the 3c905B, so all
we have to do is add the PCI ID to the list.
Reformat and initialize correctly all "struct cdevsw".
Initialize the d_maj and d_bmaj fields.
The d_reset field was not removed, although it is never used.
I used a program to do most of this, so all the files now use the
same consistent format. Please keep it that way.
Vinum and i4b not modified, patches emailed to respective authors.
of the current interrupt trasaction.
- Do not schedule the next interrupt transaction if the pipe is being
aborted or the last round of the interrupt transaction ended with error.
Submitted by: Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
- Call ums_disable() to abort the pipe.
- Do not wake up processes which has been waiting or polling for mouse
data. It won't be available anymore.
Submitted by: Kazutaka YOKOTA <yokota@zodiac.mech.utsunomiya-u.ac.jp>
use ALPHA_PHYS_TO_K0SEG(offset) rather than just plain offet. I've verified
that this does not break other platforms (I've tested an AlphaStation 200
and a Personal Workstation 500au with this patch).
As to why this works, well.. Its black magic as far as I know. I obtained
this hack from Myricom, who in turn, obtained it from Compaq engineers.
Without this hack, XFree86 cannot talk to a PCI graphics card.
Reviewed by: Doug Rabson <dfr@nlsystems.com>
Obtained from: feldy@myri.com (Bob Felderman)
similar to the PNIC I (supported by the pn driver). In fact, it's really
a Macronix 98715A with wake on LAN support added. According to LinkSys,
the PNIC II was jointly developed by Lite-On and Macronis. I get the
feeling Macronix did most of the work. (The datasheet has the Macronix
logo on it, and is in fact nearly identical to the 98715 datasheet, except
for the extra wake on LAN registers.) In any case, the PNIC II works just
fine with the Macronix driver.
The changes are:
- Move PCI ID for the PNIC II from the pn driver to the mx driver.
- Mention PNIC II support in mx.4.
- Mention PNIC II support in RELNOTES.TXT and HARDWARE.TXT.
The old version only worked right when the time was read strictly
more often than every 1/HZ seconds, but we only guarantee reading
it every (1/HZ + epsilon) seconds. Part of rev.1.126-1.127 attempted
to fix this but didn't succeed. Detect counter rollover using the
heuristic from the old version of microtime() with additional
complications for supporting calls from fast interrupt handlers.
This works provided i8254 interrupts are not delayed by more than
1/(2*HZ) seconds.
This needs more comments, and cleanups for the SMP case, and more
testing of the SMP case before it is merged into RELENG_3.
Tested by: jhay
disable_intr() does non-recursive locking in the SMP case. This should
fix cy-driver-related panics when SMP is configured.
Broken in: rev.1.73 (3.1 and -current)
easier to use and more flexible.
* Change BUS_ADD_CHILD to take an order argument instead of a place.
* Define a partial ordering for isa devices so that sensitive devices are
probed before non-sensitive ones.
(default 1) disables PMTUD globally. Although PMTUD can be disabled in
the standard case by locking the MTU on a static route (including the
default route), this method doesn't work in the face of dynamic routing
protocols like gated.
Compaq XP1000, AlphaServer DS20, AlphaServer DS10, and DP264
This has been tested *only* on XP1000's. I'll be interested to hear from
owners of other types of DEC_ST6600 alphas.
I'd like to thank Don Rice of Compaq for providing the documentation required
to support this platform on FreeBSD. I'd also like to thank Doug Rabson for newbus,
and for helping me get a multiple hoses working with newbus.
Reviewed by: Doug Rabson <dfr@nlsystems.com>
Allow chipset drivers to specify the direct-mapped DMA window's mask in
preparation for tsunami support. Previous chipsets' direct-mapped DMA
mask was always 1024*1024*1024. The Tsunami chipset needs it to be
2*1024*1024*1024
Reviewed by: Doug Rabson <dfr@nlsystems.com>
preparation for tsunami support. Previous chipsets' direct-mapped DMA
mask was always 1024*1024*1024. The Tsunami chipset needs it to be
2*1024*1024*1024
These changes should not affect the i386 port
Reviewed by: Doug Rabson <dfr@nlsystems.com>
- Clear the IFF_OACTIVE flag when al_txeof() runs down the last TX mbuf chain.
- Mark the workaround for the transmitter stalling bug with
#ifdef AL_TX_STALL_WAR/#endif.
only support 'mirroring' the vendor and device ids, so we don't
lose any information. Certain revisions of the aic7880 will not
perform the mirroring so to match all possiblities would double
the number of table entries. This change also allows us to match
things like the 2944B which I missed in the original table.
The XPT doesn't have a problem with this itself, but some controllers
drivers may have been caught off guard by the old behavior.
XPT_CONT_TARGET_IO is also a valid ccb type for cam_periph_unmapmem.
commands are outstanding. You'd think they'd just clear the IDLE bit,
but alas, no. Delay until all pending mailbox commands have completed
in aha_cmd to work around this.
Report sync rates correctly on Fast Adaptec cards. Clones may still be
reported incorrectly since there is no documenation on how they report
extended sync values.
Clean up some unused fields in the aha softc.
Mark Dawson holds teh copyright on this and has releases from
Compaq to allow him to do so..
Not functional in 4.0 yet but being checked in to allow the functional
3.x version to be branched at this point.
|revision 1.13
|date: 1995/09/15 23:49:23; author: davidg; state: Exp; lines: +15 -2
|Check for page being resident when doing I/O with /dev/kmem and return
|EFAULT if it is not resident. This prevents the system from manufacturing
|a zero-fill page for unused but allocated areas of the kernel's VM.
writing, we want to be able to read the buffer. If we're reading, we want
to be able to write to the buffer.
PR: kern/11870
Submitted by: Andrew Mobbs <amobbs@allstor-sw.co.uk>
This is an old OPTi chipset.
If you use a Bt878 card with this chipset, be sure to enable
the SIS/VIA chipset compatiblity mode workaround.
Tested By: Ben Laurie <ben@algroup.co.uk>
SIS/VIA/ OPTi chipset PCI bus workarounds.
These make the Bt878/879 chips stabler on certain
older and non-intel motherboards.
Use options BKTR_430_FX_MODE
or options BKTR_SIS_VIA_MODE
to enable these modes.
Also rename 849 to 849A
in the transmit code: the TX descriptor ring, and a 'shadow' ring of mbuf
pointers, one for each TX descriptor. When transmitting a packet that
consists of several fragments in an mbuf chain, we link each fragment
to a descriptor in the TX ring, but we only save a pointer to the mbuf
chain. This pointer is saved in the shadow ring entry which corresponds
to the first fragment in the packet. Later, ti_txeof() can release the
whole chain with a single m_freem() call. (We need the second ring to
keep track of the virtual addresses of the mbuf chains.)
The problem with this is that the Tigon isn't actually through with the
mbuf chain until it reaches the last fragment (which has the TI_BDFLAG_END
bit set), however the current scheme releases the mbuf chain as soon as
the first fragment is consumed. This is wrong, since the mbufs can then
be yanked out from under the Tigon and modified before the other fragments
can be transmitted.
The fix is to make a one line change to ti_encap() so that it saves the
mbuf chain pointer in the shadow ring entry that corresponds to the last
fragment in TX ring instead of the first. This prevents the mbufs from
being released until the last fragment is transmitted.
Painstakingly diagnosed and fixed by: Robert Picco <picco@mail.wevinc.com>
Brought to my attention by: dg
+ add a missing call to dn_rule_delete() when flushing firewall
rules, thus preventing possible panics due to dangling pointers
(this was already done for single rule deletes).
+ improve "usage" output in ipfw(8)
+ add a few checks to ipfw pipe parameters and make it a bit more
tolerant of common mistakes (such as specifying kbit instead of Kbit)
PR: kern/10889
Submitted by: Ruslan Ermilov
manager and prevented IOPort allocation beyond the first EISA slot from
working. subr_rman.c should have trapped this on the way into the system
rather than tripping over the wreckage.
Head banged into wall repeatedly by: "Matthew N. Dodd" <winter@jurai.net>
if there is no character device associated with the block device. In this
case that doesn't matter because bdevvp() doesn't use the character
device structure.
I can use the pointy bit of the axe too.
on systems with no FFS.
- Remove all references to mfs from cpu_rootconf(). mfs_init is
called prior to cpu_rootconf(), so it can set mountrootfsname to mfs
and (more imporantly) set rootdev using the (bogus in Bruce's opinion)
special major number of 255.
- Fix an error message.
- Do the MFS_ROOT setting of mountrootfsname in mfs_init() instead of
cpu_rootconf().
- Set rootdev in mfs_init instead of later in mfs_mount() iff MFS_ROOT.
Honor the 'bus reset at startup' option now that the XPT properly
handles transfer negotiation in this scenario.
Honor the sync rate settings on Ultra2 controllers. We would
always negotiate at the fastest speed. Oops.
aic7xxx.h:
Whitespace.
aic7xxx.seq:
Fix a minor nit that would cause the controller to miss the update
of the negotiation required bitmask causing the negotiation to
be delayed by a command.
code in all initiator type peripheral drivers.
scsi_target.c:
Release ATIO structures that wind up in the 'unkown command queue'
for consumption by our userland counterpart, back to the controller
when the exception for that command is cleared.
types allow the reporting of error counts and other statistics. Currently
we provide information on the last BDR or bus reset as well as active
transaction inforamtion, but this will be expanded as more information is
added to aid in error recovery.
Use the 'last reset' information to better handle bus settle delays.
Peripheral drivers now control whether a bus settle delay occurs and
for how long. This allows target mode peripheral drivers to avoid
having their device queue frozen by the XPT for what shoudl only be
initiator type behavior.
Don't perform a bus reset if the target device is incapable of performing
transfer negotiation (e.g. Fiber Channel).
If we don't perform a bus reset but the controller is capable of transfer
negotiations, force negotiations on the first transaction to go to the
device. This ensures that we aren't tripped up by a left over negotiation
from the prom, BIOS, loader, etc.
Add a default async handler funstion to cam_periph.c to remove duplicated
code in all initiator type peripheral drivers.
Allow mapping of XPT_CONT_TARGET_IO ccbs from userland. They are
itentical to XPT_SCSI_IO ccbs as far as data mapping is concerned.
driver lacks error recovery and still needs more testing, but it's
about time I got it under revision control.
Submitted by: Tekram Inc.
Bus Space/DMA and cleanup: gibbs
- Mention that the 6Mbps turbo adapters are supported in HARDWARE.TXT
and RELNOTES.TXT and the wi.4 man page
- Mention turbo adapters in the wicontrol.8 man page and provide a
complete table of available transmit speed settings
