frame, make sure to update VLAN capabilities whenever jumbo frame
is configured.
While I'm here rearrange interface capabilities configuration. The
controller requires VLAN hardware tagging to make TSO work on VLANs
so explicitly check this requirement.
Tx DMA burst size 2048, I beleive PCIe maximum read request size
also should match to the value of Tx DMA burst size. With this
change I can get more than 800Mbps for TCP bulk transfers.
Previously I was not able to get more than 700Mbps. If I enable TSO
it now shows 927Mbps.
reacquiring driver lock in Rx handler. re(4) drops a driver lock
before passing received frame to upper stack and reacquire the
lock. During the time window ioctl calls could be executed and if
the ioctl was interface down request, driver will stop the
controller and free allocated mbufs. After that when driver comes
back to Rx handler again it does not know what was happend so it
could access free mbufs which in turn cause panic.
Reported by: Norbert Papke < npapk <> acm dot org >
Tested by: Norbert Papke < npapk <> acm dot org >
IF_ADDR_UNLOCK() across network device drivers when accessing the
per-interface multicast address list, if_multiaddrs. This will
allow us to change the locking strategy without affecting our driver
programming interface or binary interface.
For two wireless drivers, remove unnecessary locking, since they
don't actually access the multicast address list.
Approved by: re (kib)
MFC after: 6 weeks
CPU for too long period than necessary. Additively, interfaces are kept
polled (in the tick) even if no more packets are available.
In order to avoid such situations a new generic mechanism can be
implemented in proactive way, keeping track of the time spent on any
packet and fragmenting the time for any tick, stopping the processing
as soon as possible.
In order to implement such mechanism, the polling handler needs to
change, returning the number of packets processed.
While the intended logic is not part of this patch, the polling KPI is
broken by this commit, adding an int return value and the new flag
IFCAP_POLLING_NOCOUNT (which will signal that the return value is
meaningless for the installed handler and checking should be skipped).
Bump __FreeBSD_version in order to signal such situation.
Reviewed by: emaste
Sponsored by: Sandvine Incorporated
checksum offload frames. Software workaround used for broken
controllers(RTL8169, RTL8168, RTL8168B) seem to cause watchdog
timeouts on RTL8139C+.
Introduce a new flag RL_FLAG_AUTOPAD to mark automatic padding
feature of controller and set it for RTL8139C+ and controllers that
use new descriptor format. This fixes watchdog timeouts seen on
RTL8139C+.
Reported by: Dimitri Rodis < DimitriR <> integritasystems dot com >
Tested by: Dimitri Rodis < DimitriR <> integritasystems dot com >
It seems that RTL8168D and RTL8102EL requires additional settle
time to complete RL_PHYAR register write. Accessing RL_PHYAR
register right after the write causes errors for subsequent PHY
register accesses.
Tested by: george at luckytele dot com,
Steve Wills < STEVE at stevenwills dot com >
mapping. The tunable is OFF for all controllers except RTL8169SC
family. RTL8169SC seems to require more magic to use memory
register mapping. r187483 added a fix for RTL8169SCe controller but
it does not looke like fix other variants of RTL8169SC.
Tested by: Gavin Stone-Tolcher g.stone-tolcher <> its dot uq dot edu dot au
controllers that lose Tx completion interrupts under certain
conditions. With this change it's safe to use MSI on PCIe
controllers so enable MSI on these controllers.
- Always program RX configuration register from scratch instead of
doing read/modify/write.
- Rename re_setmulti() to re_set_rxmode() to be reflect reality.
- Simplify hash filter logic a little while I am here.
Reviewed by: yongari (early version)
event from mii(4) may not be delivered if valid link was already
established. To address the issue, check current link state after
driving MII_TICK. This should fix a regression introduced in
r185753 on fast ethernet controllers.
Reported by: csjp, Bruce Cran < bruce <> cran DOT org DOT uk >
Tested by: csjp, Bruce Cran (initial version)
command whenever Tx completion interrupt is raised. The Tx poll
bit is cleared when all packets waiting to be transferred have been
processed. This means the second Tx poll command can be silently
ignored as the Tx poll bit could be still active while processing
of previous Tx poll command is in progress.
To address the issue re(4) used to invoke the Tx poll command in Tx
completion handler whenever it detects there are pending packets in
TxQ. However that still does not seem to completely eliminate
watchdog timeouts seen on RealTek PCIe controllers. To fix the
issue kick Tx poll command only after Tx completion interrupt is
raised as this would indicate Tx is now idle state such that it can
accept new Tx poll command again. While here apply this workaround
for PCIe based controllers as other controllers does not seem to
have this limitation.
Tested by: Victor Balada Diaz < victor <> bsdes DOT net >
out of sleep mode prior to accessing to PHY. This should fix device
attach failure seen on these controllers. Also enable the sleep
mode when device is put into sleep state.
PR: kern/123123, kern/123053
Waiting for 1ms for each GMII register access looks overkill and it
may also decrease overall performance of driver because re(4)
invokes mii_tick for every hz.
Tested by: rpaulo
established a valid link or not. In miibus_statchg handler add a
check for established link is valid one for the controller(e.g.
1000baseT is not a valid link for fastethernet controllers.)
o Added a flag RE_FLAG_FASTETHER to mark fastethernet controllers.
o Added additional check to know whether we've really encountered
watchdog timeouts or missed Tx completion interrupts. This change
may help to track down the cause of watchdog timeouts.
o In interrupt handler, removed a check for link state change
interrupt. Not all controllers have the bit and re(4) did not
rely on the event for a long time. In addition, re(4) didn't
request the interrupt in RL_IMR register.
Tested by: rpaulo
reading from EEPROM doesn't seem to work on these controllers.
Reported by: Milan Obuch ( freebsd-net at dino dot sk )
Tested by: Milan Obuch ( freebsd-net at dino dot sk )
watchdog timeout issues and the root cause seems to stem from
silicon bug of controller. Personally I couldn't reproduce it on
RTL8169 controller but it seems it's dependent on usage pattern.
For newer PCIe based controllers I have no TSO complaints but
turning off TSO would be more safe. Users who are sure that
their controller works with TSO can still reenable the TSO with
ifconfig(8).
Reported by: Oliver Lehmann (lehmann at ans-netz dot de), Eugene Butusov (ebutusov at gmail dot com)
11bits. This limits the maximum interface MTU size in TSO case
as upper stack should not generate TCP segments with MSS greater
than the limit. Armed with this information, disable TSO if
interface MTU is greater than the limit.
generation of RTL810x PCIe fast ethernet controller. Note, Tx/Rx
descriptor format is different from that of first generation of
RTL8101E series. Jumbo frame is not supported for RTL810x
family.
Tested by: NAGATA Shinya ( maya AT negeta DOT com )
ATM Tx/Rx checksum offload is supported but TSO and jumbo frame is
not yet supported. Because these newer controllers use different
descriptor formats, a flag RL_FLAG_DESCV2 flag was introduced to
handle that case in Tx/Rx handler. Also newer controllers seems to
require to not touch 'enable Tx/Rx bit' in RL_CPLUS_CMD register
so don't blindly try to set that bits.
Note, it seems that there is still power-saving related issue where
driver fails to attach PHY. Rebooting seems to fix that issue but
number of required reboots varys.
Many thanks to users that helped during developement. I really
appreciate their patient and test/feedbacks.
