Collect together the components of several drivers and export eisa from
the i386-only area (It's not, it's on some alphas too). The code hasn't
been updated to work on the Alpha yet, but that can come later.
Repository copies were done a while ago.
Moving these now keeps them in consistant place across the 4.x series
as the newbusification progresses.
Submitted by: mdodd
makes it a little easier to notice that parity checking an 8bit sram
isn't working.
Turn on scb and internal data-path parity checking for all pci chips types.
We were only doing this for ultra2 chips.
After clearing the parity interrupt status, clear the BRKADRINT. This
avoids seeing a bogus BRKADRINT interrupt after external SCB probing
once normal interrupts are enabled.
93cx6.c:
Make the SRAM dump output a little prettier.
aic7xxx.c:
Store all SG entries into our SG array in kernel space.
This makes data-overrun and other error reporting more
useful as we can dump all SG entries. In the past,
we only stored the SG entries that the sequencer might
need to access, which meant we skipped the first element
that is embedded into the SCB.
Add a table of chip strings and replace ugly switch
statements with table lookups.
Add a table with bus phase strings and message reponses
to parity errors in those phases. Use the table to
pretty print bus phase messages as well as collapse
another switch statement.
Fix a bug in target mode that could cause us to unpause
the sequencer early in bus reset processing.
Add the 80MHz/DT mode into our syncrate table. This
rate is not yet used or enabled.
Correct some comments, clean up some code...
aic7xxx.h:
Add U160 controller feature information.
Add some more bit fields for various SEEPROM formats.
aic7xxx.reg:
Add U160 register and register bit definitions.
aic7xxx.seq:
Make phasemis state tracking more straight forward. This
avoids the consumption of SINDEX which is a very useful register.
For the U160 chips, you must use the 'mov' instruction to
update DFCNTRL. Using 'or' to set the PRELOADED bit is
completely ineffective.
At the end of the command phase, wair for our ACK signal
to de-assert before disabling the SCSI dma engine. For
slow devices, this avoids clearing the ACK before the
other end has had a chance to see it and lower REQ.
controllers will run at U2 speeds until I can complete the U160 support
for this driver.
Correct a termination buglet for the 2940UW-Pro.
Be more paranoid in how we probe and enable external ram, fast external
ram timing and external ram parity checking. We should now work on
20ns and 8bit SRAM parts.
Perform initial setup for the DT feature on cards that support it.
Factorize and clean up code. Use tables where it makes sense, etc.
Add some delays in dealing with the board control logic. I've never
seen this code fail, but with the ever increasing speed of processors,
its better to insert deterministic delays just to be safe. This stuff
is only touched during probe and attach, so the extra delay is of no
concern.
is an application space macro and the applications are supposed to be free
to use it as they please (but cannot). This is consistant with the other
BSD's who made this change quite some time ago. More commits to come.
the input fifo to be returned as successful and frozen. Most, if not
all, peripheral drivers do not check the qfrozen bit for successfully
completed commands, so the result would not only be lost commands, but
devices locked out from receiving commands. This was a bad bug that
crept in two or three months ago during some target mode work.
Don't arbitrarily limit the initiator ID of the card to something <= 7.
Fix a bug in the checksum code that would incorrectly prevent a valid
checksum of zero. (cp)
Don't touch rely on seeprom data when configuring termination. We may
not have seeprom data. (cp)
Treat all ULTRA2 capable adapters the same way when reading or writing
the BRDCTL register. We previously only did this correctly for aic7890/91
chips. This should correct some problems with termination settings on
aic7896/97 adapters. (cp)
Changes marked with "(cp)"
Pointed out by: Chuck Paterson <cp@bsdi.com>
aic7xxx.c:
Add a function for sucking firmware out of the controller
prior to reset.
Remove some inline bloat from functions that should not have
been inlined.
During initialization, wait 1ms after the chip reset before
touching any registers. You can get machine checks on certain
architectures (Atari I think?) without the delay.
Return CAM_REQ_CMP for external BDR requests instead
of CAM_BDR_SENT.
Bump some messages to bootverbose levels above 1.
Don't clear any negotiated sync rate if the target rejects
a WDTR message. The sync rate is only cleared if the target
accepts a WDTR message.
Fix a small bug in the mesgin handling code that could cause
us to believe that we had recieved a message that was actually
received by another target. This could only confuse us in
some very rare transmission negotiation scenarios.
Remove some unecessary cleanup of residual information after
a residual is reported. The sequencer does this when the
command is queued now.
usually cleared by a successful selection, but there is no guarantee
that a future successful selection will ever occur (e.g. empty bus).
The driver never looks at SELINGO, but the busy LED does, so this
change has the cosmetic effect of fixing the rare instance where the
busy LED was left on, confusing the user.
aic7xxx parts. This problem could result in data corruption
during periods of my PCI bus load by busmasters other than the
aic7xxx.
Many thanks to Andrew Gallatin <gallatin@cs.duke.edu> for characterizing
the symptoms of this problem and testing this fix.
Break out the detection logic for the aic7855 and properly report
these chips as 7855s instead of 7850s.
The 2940AU_CN is an aic7860 based card, not aic7860.
Not setting CACHETHEN turned out to be a bad idea. It can cause
spurious corruption under heavy PCI load with multiple masters.
events, in order to pave the way for removing a number of the ad-hoc
implementations currently in use.
Retire the at_shutdown family of functions and replace them with
new event handler lists.
Rework kern_shutdown.c to take greater advantage of the use of event
handlers.
Reviewed by: green
messages, abort messages, and abort tag messages.
Fix a bug in how default transfer negotiations are handled if the
user had disabled initial bus resets.
Support multi-targetid on the aic7895C.
the aic7890/91/96/97 cards. This could cause the system to go into
a long retry/recovery loop during probe.
Fix the alignment argument to bus_dma_tag_create().
Don't set the CACHETHEN bit in dscommand0 for Ultra2 controllers
until we know more about its behavior. The description for this
bit makes it sound like it could cause problems with certain
PCI chipsets.
eisa_add_intr() which now takes an additional arguement (one of
EISA_TRIGGER_LEVEL or EISA_TRIGGER_EDGE).
The flag RR_SHAREABLE has no effect when passed to
bus_alloc_resource(dev, SYS_RES_IRQ, ...) in an EISA device context as
the eisa_alloc_resource() call (bus_alloc_resource method) now deals
with this flag directly, depending on the device ivars.
This change does nothing more than move all the 'shared = inb(foo + iobsse)'
nonesense to the device probe methods rather than the device attach.
Also, print out 'edge' or 'level' in the IRQ announcement message.
Reviewed by: dfr
only support 'mirroring' the vendor and device ids, so we don't
lose any information. Certain revisions of the aic7880 will not
perform the mirroring so to match all possiblities would double
the number of table entries. This change also allows us to match
things like the 2944B which I missed in the original table.
Honor the 'bus reset at startup' option now that the XPT properly
handles transfer negotiation in this scenario.
Honor the sync rate settings on Ultra2 controllers. We would
always negotiate at the fastest speed. Oops.
aic7xxx.h:
Whitespace.
aic7xxx.seq:
Fix a minor nit that would cause the controller to miss the update
of the negotiation required bitmask causing the negotiation to
be delayed by a command.
Clean up the handling of failure modes in our attach so we don't free
resources twice. ahc_free() will do all of the work for us (as would
be required by an unload event) so we only need to handle resources that
the softc has not taken ownership of.
Sync up device Ids with the master Adaptec list.
Add probe support for the 2940 Pro although it isn't obvious that
all of the termination support is correct for this adapter yet.
tell the sequencer to pause itself for a target msg variable update. This
avoids the pause race entirely as HS_MAILBOX can be accessed without
pausing the chip.
3.2 Merge candidate.
NOTE: These changes will require recompilation of any userland
applications, like cdrecord, xmcd, etc., that use the CAM passthrough
interface. A make world is recommended.
camcontrol.[c8]:
- We now support two new commands, "tags" and "negotiate".
- The tags commands allows users to view the number of tagged
openings for a device as well as a number of other related
parameters, and it allows users to set tagged openings for
a device.
- The negotiate command allows users to enable and disable
disconnection and tagged queueing, set sync rates, offsets
and bus width. Note that not all of those features are
available for all controllers. Only the adv, ahc, and ncr
drivers fully support all of the features at this point.
Some cards do not allow the setting of sync rates, offsets and
the like, and some of the drivers don't have any facilities to
do so. Some drivers, like the adw driver, only support enabling
or disabling sync negotiation, but do not support setting sync
rates.
- new description in the camcontrol man page of how to format a disk
- cleanup of the camcontrol inquiry command
- add support in the 'devlist' command for skipping unconfigured devices if
-v was not specified on the command line.
- make use of the new base_transfer_speed in the path inquiry CCB.
- fix CCB bzero cases
cam_xpt.c, cam_sim.[ch], cam_ccb.h:
- new flags on many CCB function codes to designate whether they're
non-immediate, use a user-supplied CCB, and can only be passed from
userland programs via the xpt device. Use these flags in the transport
layer and pass driver to categorize CCBs.
- new flag in the transport layer device matching code for device nodes
that indicates whether a device is unconfigured
- bump the CAM version from 0x10 to 0x11
- Change the CAM ioctls to use the version as their group code, so we can
force users to recompile code even when the CCB size doesn't change.
- add + fill in a new value in the path inquiry CCB, base_transfer_speed.
Remove a corresponding field from the cam_sim structure, and add code to
every SIM to set this field to the proper value.
- Fix the set transfer settings code in the transport layer.
scsi_cd.c:
- make some variables volatile instead of just casting them in various
places
- fix a race condition in the changer code
- attach unless we get a "logical unit not supported" error. This should
fix all of the cases where people have devices that return weird errors
when they don't have media in the drive.
scsi_da.c:
- attach unless we get a "logical unit not supported" error
scsi_pass.c:
- for immediate CCBs, just malloc a CCB to send the user request in. This
gets rid of the 'held' count problem in camcontrol tags.
scsi_pass.h:
- change the CAM ioctls to use the CAM version as their group code.
adv driver:
- Allow changing the sync rate and offset separately.
adw driver
- Allow changing the sync rate and offset separately.
aha driver:
- Don't return CAM_REQ_CMP for SET_TRAN_SETTINGS CCBs.
ahc driver:
- Allow setting offset and sync rate separately
bt driver:
- Don't return CAM_REQ_CMP for SET_TRAN_SETTINGS CCBs.
NCR driver:
- Fix the ultra/ultra 2 negotiation bug
- allow setting both the sync rate and offset separately
Other HBA drivers:
- Put code in to set the base_transfer_speed field for
XPT_GET_TRAN_SETTINGS CCBs.
Reviewed by: gibbs, mjacob (isp), imp (aha)
Convert to new bus and bus dma.
Use latest PCI API.
bt_pci.c:
Fix a few bugs in how resourses are released left over from
when this driver was converted to new bus.
had a quirk that made a shim rather hard to implement properly and it was
just easier to convert the drivers in one go. The changes to the
buslogic driver go beyond just this - the whole driver was new-bus'ed
including pci and isa. I have only tested the EISA part of this so far.
Submitted by: Doug Rabson <dfr@nlsystems.com>
