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Commit Graph

67 Commits

Author SHA1 Message Date
Juli Mallett
529fb1406b o) Remove some unused local definitions of IP protocol numbers.
o) Use CPU_FOREACH rather than a miscrafted for loop with an off-by-one to
   enable workq interrupts on all cores.
2011-01-09 23:05:46 +00:00
Juli Mallett
7b62328843 o) Add MIPS_COP_0_EXC_PC accessors to <machine/cpufunc.h>.
o) Make the octeon_wdog driver work on multi-CPU systems and to also print more
   information on NMI that may aid debugging.  Simplify and clean up internal
   API and structure.
2011-01-04 02:33:48 +00:00
Juli Mallett
5308af6337 o) Unmask Central Interrupt Unit interrupts on APs, too.
o) There's no good reason to make the low bits of the ebase the core
   number.  While per-CPU exception bases would be nice, for now we just
   need to make ebase the same on all cores.
2011-01-04 02:11:03 +00:00
Juli Mallett
1dadcedcfc When allocating memory from bootmem for the kernel to use, try to leave about
2MB of memory in the bootmem allocator for the SDK to use internally at a later
point.  It'd be nice if there were some functions we could call before
allocating memory to let various facilities reserve some memory, but for now
this seems sufficient.  Previously some unfortunate systems could give up all
(or at least most) of their memory to the kernel from bootmem, and then
allocating command queues for packet output and the like would fail later in
the boot process (which in turn would lead to crashes even later.)

Reported by:	kan
2010-12-28 20:11:54 +00:00
Juli Mallett
4a7b75273b o) Add support for the Lanner MR-321X/MR-325, which is just a modified MR-320.
o) On the Lanner MR-730, disable PCIe lane swap, per vendor.
2010-12-16 07:20:38 +00:00
Oleksandr Tymoshenko
bd01e50ca0 - dump_avail layout should be sequence of [start, end)
pairs, not <start, size>.

Spotted by: alc@
2010-12-09 07:47:40 +00:00
Oleksandr Tymoshenko
99629fa36d - Populate dump_avail with proper values from phys_avail 2010-12-09 07:01:03 +00:00
Juli Mallett
648260edcc Add interrupt describing and binding to CIU. 2010-12-01 05:24:29 +00:00
Juli Mallett
074a0a8d57 Run all poll requests through a single function that can either do the generic
link state polling or media-specific ones, while avoidiing changing link state
on interfaces that use miibus; this substantially speeds up link time on
interface (re)initialization.
2010-11-30 07:14:05 +00:00
Juli Mallett
6d903e0c7a Display some Octeon 2 features and a feature for distinguishing between PCIe
implementations.
2010-11-30 01:27:54 +00:00
Juli Mallett
b8248487b3 Don't free the work queue entry that we're using to hold the scatter-gather
list on exit from the transmit path.  The scatter-gather list itself can be
asynchronously DMAed to the transmit hardware, and we could actually lock up
the transmitter if any of a number of races around this were lost.

Instead, let the PKO free the scatter-gather list when it is done with it, and
use the "i" bit in each segment of the packet to avoid having them go into the
FPA.

This fixes an unrecoverable transmit stall under transmit load.

MFC after:	3 days
2010-11-29 21:04:00 +00:00
Juli Mallett
04b6fa8330 Merge Cavium Octeon SDK 2.0 Simple Executive; this brings some fixes and new
facilities as well as support for the Octeon 2 family of SoCs.

XXX Note that with our antediluvian assembler, we can't support some Octeon 2
    instructions and fall back to using the old ones instead.
2010-11-28 08:18:16 +00:00
Oleksandr Tymoshenko
006d0f38be - Add watchdog driver for Cavium Octeon. At the moment only
UP systems are supported.
2010-11-28 08:11:05 +00:00
Juli Mallett
34e3f53b7c o) Remove some commented out or unimplemented code.
o) Remove some options that are configurable on Linux but not FreeBSD.
o) Centralize open/poll/stop routines for XAUI and SGMII and use the common
   uninit routine directly rather than providing a wrapper for it.  The init
   functions for these interfaces are now identical and the common init routine
   could merge in setting those function pointers except that some hardware
   seems to use no open/poll/stop method?
2010-11-28 05:57:24 +00:00
Juli Mallett
ed11b5abe1 Remove unused and broken code to implement POW send and POW-only devices; a
separate POW driver makes more sense, generally.
2010-11-28 00:26:08 +00:00
Juli Mallett
25b0900026 Use if_transmit to avoid ifq locking in transmit path. 2010-11-27 22:42:41 +00:00
Warner Losh
161b83b959 Remove the 'machine mips' from DEFAULTS. Put the proper 'machine mips
mipsel' or 'machine mips mipseb' into the config file (with a few 64's
tossed in for good measure).  This will let us build the proper
kernels with different worlds as part of make universe.
2010-11-13 22:34:12 +00:00
Juli Mallett
4ad7c12b2c Don't attach the PCI bus driver if the board we're being run on has PCIe. The
two are mutually-exclusive on Octeon.
2010-11-03 23:29:52 +00:00
Juli Mallett
bc41e12963 Declare the CF GEOM class so that g_modevent will get called, the class will
be recorded, etc.  This fixes libgeom on Octeon.
2010-11-02 23:43:44 +00:00
Marius Strobl
8e5d93dbb4 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
Juli Mallett
2bcbafd6be Keep polling at 50hz as long as link state is changing. 2010-10-13 21:45:56 +00:00
Juli Mallett
f05957f7c6 o) Make it possible to attach a PHY directly to an octe device rather than
using miibus, since for some devices that use multiple addresses on the bus,
   going through miibus may be unclear, and for devices that are not standard
   MII PHYs, miibus may throw a fit, necessitating complicated interfaces to
   fake the interface that it expects during probe/attach.
o) Make the mv88e61xx SMI interface in octe attach a PHY directly and fix some
   mistakes in the code that resulted from trying too hard to present a nice
   interface to miibus.
o) Add a PHY driver for the mv88e61xx.  If attached (it is optional in kernel
   compiles so the default behavior of having a dumb switch is preserved) it
   will place the switch in a VLAN-tagging mode such that each physical port
   has a VLAN associated with it and interfaces for the VLANs can be created to
   address or bridge between them.
   XXX It would be nice for this to be part of a single module including the
       SMI interface, and for it to fit into a generic switch configuration
       framework and for it to use DSA rather than VLANs, but this is a start
       and gives some sense of the parameters of such frameworks that are not
       currently present in FreeBSD.  In lieu of a switch configuration
       interface, per-port media status and VLAN settings are in a sysctl tree.
   XXX There may be some minor nits remaining in the handling of broadcast,
       multicast and unknown destination traffic.  It would also be nice to go
       through and replace the few remaining magic numbers with macros at some
       point in the future.
   XXX This has only been tested with the MV88E6161, but it should work with
       minimal or no modification on related switches, so support for probing
       them was included.

Thanks to Pat Saavedra of TELoIP and Rafal Jaworowski of Semihalf for their
assistance in understanding the switch chipset.
2010-10-13 09:17:44 +00:00
Juli Mallett
a22b69b772 o) Allow devices to override the MDIO read and write functions presented to
the miibus attached to octe interfaces.
o) Add an SMI/MDIO interface to the MV88E61XX and use it for the switch PHY on
   the Lanner MR-320.  An actual driver for the switch PHY will come later.
   Note that for now it intercepts and fakes MII_BMSR reads to prevent the
   miibus from talking to anything but the switch itself.
2010-10-02 05:43:17 +00:00
Juli Mallett
41341ca726 Rather than shifting offsets by three, set register offset to 3. All our
bus interface does that's special here now is to use a 64-bit register size.
In theory, uart(4) ought to support a regsz as well as regshft and support
64-bit registers directly.

Also use the UART class's range rather than a hand-coded 1024 for the address
range.
2010-10-02 05:38:45 +00:00
Juli Mallett
50cfdcbd6f Remove extra cpu setting and commented-out devices, some of which don't exist. 2010-10-02 01:28:18 +00:00
Juli Mallett
62f24c60ef Give devices lots of time to settle around programming BARs and command
registers.  Without this, the settings do not seem to stick for Atheros NICs in
the PCI slot of the Lanner MR-320.
2010-09-27 20:35:40 +00:00
Juli Mallett
a71199dab4 o) Program the Lanner MR-320 for 32-bit mode, too.
o) Give a virtual address for I/O ports on n64.
o) On the Portwell CAM-0100, return the right IRQ for the on-board SATA.
o) Except on bridges, only set PORTEN and MEMEN on devices that have I/O or
   memory BARs respectively.
o) Disable PORTEN and MEMEN while reprogramming BARs.
o) On the Lanner MR-955, set the Tx DMA power register for the on-board Promise
   SATA controller.
2010-09-27 20:12:57 +00:00
Juli Mallett
243ee7e777 o) Send mbufs to BPF listeners from within cvm_oct_xmit().
o) Pin receive threads when they're running since we do access some core-local
   resources.
2010-09-25 04:39:12 +00:00
Juli Mallett
1ea299ce0d Handle link updates in a task. 2010-09-25 01:18:01 +00:00
Juli Mallett
709d8161a6 Make the vast majority of Simple Executive files standard. Perhaps some of
these could be made dependent on either of the octusb or octe options, but
making them standard fixes a number of option combinations that were previously
broken.
2010-09-24 21:23:23 +00:00
Juli Mallett
a4f7e65822 o) Add bus_teardown_intr for pci and ciu. This allows the Promise SATA
driver to try to switch interrupt handlers at setup.  It's not a very
   good implementation of bus_teardown_intr, though.
o) Set cache line size and latency timers for PCI devices per Linux.
2010-09-24 02:41:52 +00:00
Juli Mallett
3032f6daa2 Flesh out PCI bus support some:
o) Reset and configure the bus from scratch rather than expecting U-Boot to
   do it for us.  Values and configuration from Linux, U-Boot and comments
   in the Cavium Simple Executive sources.
o) Do a resource assignment and bus numbering pass in the absence of a PCI
   BIOS or firmware that will do it for us.
   XXX This has to be the third or fourth instance of this in FreeBSD and
       it would be nice to have it become part of the PCI bus driver itself,
       like it is on Linux.
o) Fix interrupt mapping for and adjust bus configuration for the Lanner
   MR-955, based on information provided by Lanner.
2010-09-24 00:14:24 +00:00
Juli Mallett
c0b690401a Fix to specify generic bus_add_child. 2010-09-19 09:18:27 +00:00
Juli Mallett
ed48d90907 Don't use memory that can't be direct-mapped on !n64. 2010-09-19 09:18:07 +00:00
Juli Mallett
e61d3369bf Fix octusb build. 2010-09-18 00:58:44 +00:00
Neel Natu
885b75a559 Make the meaning of the 'mask' argument to 'set_intr_mask(mask)' consistent
with the meaning of IM bits in the status register.

Reviewed by:	jmallett, jchandra
2010-09-15 05:10:50 +00:00
Juli Mallett
bfa39fa09f o) Add the "octusb" controller which supports the first port of the Octeon
on-board USB controller.  It is not currently enabled because there are
   known problems with device communication and until those are fixed I am not
   certain that it won't destabilize the system. [1]
o) Add the "cryptocteon" opencrypto device based on the OCF device written by
   David McCullough.  It is not currently enabled because until support for
   saving/restoring coprocessor 2 state on context switch is available, it runs
   with interrupts disabled, which tends to pessimize performance over using a
   software crypto facility.  Tests using this driver which are not negatively
   affected by it running with interrupts disabled show it to be substantially
   faster than software for large blocks.

Submitted by:	hps [1]
2010-07-20 19:32:25 +00:00
Juli Mallett
cea2b8b915 Update the port of FreeBSD to Cavium Octeon to use the Cavium Simple Executive
library:
o) Increase inline unit / large function growth limits for MIPS to accommodate
   the needs of the Simple Executive, which uses a shocking amount of inlining.
o) Remove TARGET_OCTEON and use CPU_CNMIPS to do things required by cnMIPS and
   the Octeon SoC.
o) Add OCTEON_VENDOR_LANNER to use Lanner's allocation of vendor-specific
   board numbers, specifically to support the MR320.
o) Add OCTEON_BOARD_CAPK_0100ND to hard-wire configuration for the CAPK-0100nd,
   which improperly uses an evaluation board's board number and breaks board
   detection at runtime.  This board is sold by Portwell as the CAM-0100.
o) Add support for the RTC available on some Octeon boards.
o) Add support for the Octeon PCI bus.  Note that rman_[sg]et_virtual for IO
   ports can not work unless building for n64.
o) Clean up the CompactFlash driver to use Simple Executive macros and
   structures where possible (it would be advisable to use the Simple Executive
   API to set the PIO mode, too, but that is not done presently.)  Also use
   structures from FreeBSD's ATA layer rather than structures copied from
   Linux.
o) Print available Octeon SoC features on boot.
o) Add support for the Octeon timecounter.
o) Use the Simple Executive's routines rather than local copies for doing reads
   and writes to 64-bit addresses and use its macros for various device
   addresses rather than using local copies.
o) Rename octeon_board_real to octeon_is_simulation to reduce differences with
   Cavium-provided code originally written for Linux.  Also make it use the
   same simplified test that the Simple Executive and Linux both use rather
   than our complex one.
o) Add support for the Octeon CIU, which is the main interrupt unit, as a bus
   to use normal interrupt allocation and setup routines.
o) Use the Simple Executive's bootmem facility to allocate physical memory for
   the kernel, rather than assuming we know which addresses we can steal.
   NB: This may reduce the amount of RAM the kernel reports you as having if
       you are leaving large temporary allocations made by U-Boot allocated
       when starting FreeBSD.
o) Add a port of the Cavium-provided Ethernet driver for Linux.  This changes
   Ethernet interface naming from rgmxN to octeN.  The new driver has vast
   improvements over the old one, both in performance and functionality, but
   does still have some features which have not been ported entirely and there
   may be unimplemented code that can be hit in everyday use.  I will make
   every effort to correct those as they are reported.
o) Support loading the kernel on non-contiguous cores.
o) Add very conservative support for harvesting randomness from the Octeon
   random number device.
o) Turn SMP on by default.
o) Clean up the style of the Octeon kernel configurations a little and make
   them compile with -march=octeon.
o) Add support for the Lanner MR320 and the CAPK-0100nd to the Simple
   Executive.
o) Modify the Simple Executive to build on FreeBSD and to build without
   executive-config.h or cvmx-config.h.  In the future we may want to
   revert part of these changes and supply executive-config.h and
   cvmx-config.h and access to the options contained in those files via
   kernel configuration files.
o) Modify the Simple Executive USB routines to support getting and setting
   of the USB PID.
2010-07-20 19:25:11 +00:00
Marius Strobl
f6ffc3c26b Remove redundant checking of sc_leaving (uart_intr() already handles this).
Approved by:	marcel
2010-05-02 19:07:19 +00:00
Juli Mallett
5f3173b517 o) Fix XKPHYS physical address extraction. Also define cache coherency
attributes for XKPHYS.
o) Make coprocessor 0 accessor function macros for register+selector registers
   take the full name so that e.g. (as done in this commit), prid selector 1
   can be written through mips_wr_ebase() rather than mips_wr_prid1().
o) Allow for sign extension of 32-bit segment addresses.
o) Remove an unused MIPS-I register number.
2010-04-19 06:01:58 +00:00
Juli Mallett
b6777295a6 o) Add SMP support for Octeon using U-Boot to launch all the processors at the
same time.
o) Remove some unused trivial uart functions from octeon_machdep now that the
   uart part is fully working and they are unused.
o) Use __func__ instead of __FUNCTION__.
o) Use intr_*() instead of other routines that do the same thing.
o) Remove some duplicate printfs from the Octeon port, as well as duplicate
   setting of Maxmem.
o) Use the right frequency divider on Octeon.
o) Use PCPU_GET(cpuid) consistently to get the cpuid of the running core.
o) Remove some unused macros in the Octeon port.
o) Use mips_sync() around use of the global dpcpu, whose value may not be
   visible to APs at first.
o) When loading the first thread's stack, use macros to make the code correct
   for n64 as well.
o) Remove stub, do-nothing FAU init/enable/disable functions from the RGMX
   driver.
2010-04-17 03:08:13 +00:00
Juli Mallett
0c7964a064 o) Use octeon_fpa_alloc_phys in a situation in which we don't need a usable
pointer, rather than octeon_fpa_alloc.
o) Report half duplex status properly.
o) Do not unconditionally update the last known link status in the softc.  If
   report_link isn't set, when octeon_rgmx_config_speed is called the first
   time it will tell the driver (essentially) that we have already marked the
   interface up.  Likewise, don't change media speed and duplex if only the
   link status is at issue. [1]
o) Remove manual changing of link state and let octeon_rgmx_config_speed do the
   heavy lifting. [1]

Reviewed by:	[1] imp
Sponsored by:	Packet Forensics
2010-03-13 04:55:47 +00:00
Juli Mallett
f1112d2f47 o) Send packets being queued for transmission up to BPF if there's a listener.
o) Properly configure the CAM to handle IFF_PROMISC and note where IFF_ALLMULTI
   handling would go if we didn't already force the NIC to receive all
   multicast traffic.

Reviewed by:	imp
Sponsored by:	Packet Forensics
2010-03-12 02:56:45 +00:00
Juli Mallett
9b98f51885 Don't force single user on Octeon anymore. 2010-03-11 22:25:53 +00:00
Juli Mallett
58d4fd1fdc o) Eliminate use of sc->typestr, which is always NULL.
o) Inline octeon_rgmx_mark_ready into octeon_rgmx_init.
o) Add a media status handler that reports link and media status.
o) Set link state when if_init is called.
o) Remove some printfs related to driver state changes.
o) Remove some gratuitous comments.

Reviewed by:	imp
Sponsored by:	Packet Forensics
2010-03-11 22:22:06 +00:00
Juli Mallett
89cb44523c Check for device faults and for failures to set DRQ when expected, rather
than spinning forever.  This fixes booting with CF ejected.

NB: I've made the driver pretty chatty about errors in case there's hardware
    that operates differently to mine, so we can easily track down any issues.

Reviewed by:	imp
Sponsored by:	Packet Forensics
2010-03-06 05:49:15 +00:00
Juli Mallett
9fabafd18a o) Simplify the implementation of bus read/write functions, and eliminate some
redundant implementations.
o) Use ABI, not ISA, to determine address length.
o) Disable and restore interrupts around any operation that uses all 64 bits of
   a register.  In kernels using the O32 ABI, the upper 32 bits of those
   registers is likely to be corrupted by an interrupt.

Sponsored by:	Packet Forensics
2010-03-05 22:48:34 +00:00
Juli Mallett
54e3435255 Properly detect a type of real board that claims to have a 0.0 revision.
This fixes at least memory detection on that board.

Sponsored by:	Packet Forensics
2010-03-05 22:46:11 +00:00
Juli Mallett
e0be9e6857 Do not mask off the low byte of the chipid, it makes some of the case
statements unreachable and seems to be wrong.  Fixes detection of the number
of ports available on some models.

Sponsored by:	Packet Forensics
2010-03-05 22:44:49 +00:00
Warner Losh
a62e05a4e0 Make printfs work for both OCTEON1 and OCTEON1-32 2010-02-18 19:27:00 +00:00