1
0
mirror of https://git.FreeBSD.org/src.git synced 2024-12-16 10:20:30 +00:00
Commit Graph

86 Commits

Author SHA1 Message Date
Eivind Eklund
1950f59007 Silence warnings. 1999-01-12 00:19:33 +00:00
Archie Cobbs
f1d19042b0 The "easy" fixes for compiling the kernel -Wunused: remove unreferenced static
and local variables, goto labels, and functions declared but not defined.
1998-12-07 21:58:50 +00:00
Tor Egge
f0ac792bec Attempt to handle interrupts delivered to all IO APICs by using the first
IO APIC with a sufficient number of pins.
1998-11-26 23:14:23 +00:00
Eivind Eklund
9fcdafaefc Staticize. 1998-11-26 18:50:24 +00:00
KATO Takenori
7344a7bb2e mp_machdep.c: Set a vector to boot code (PC-98).
locore.s: Tell the bios to warmboot next time (PC-98).
1998-10-10 13:37:16 +00:00
KATO Takenori
ed68ba2cd0 PC-98 doesn't have CMOS ram. 1998-10-10 09:38:02 +00:00
KATO Takenori
5baef6cd27 BIOS ROM base address is 0xe8000 on PC-98. 1998-10-08 16:15:22 +00:00
Tor Egge
572d053e17 Maintain a mapping from irq number to (ioapic number, int pin) tuple,
and use this when masking/unmasking interrupts.

Maintain a mapping from (iopaic number, int pin) tuple to irq number,
and use this when configuring devices and programming the ioapics.

Previous code assumed that irq number was equal to int pin number, and
that the ioapic number was 0.

Don't let an AP enter _cpu_switch before all local apics are initialized.
1998-09-06 22:41:42 +00:00
Bruce Evans
00671271c3 Fixed printf format errors. Only one left in LINT on i386's. 1998-08-24 02:28:16 +00:00
Mike Smith
287e61c39f Presently there is only one `currentldt' variable for all cpus
in a SMP system. Unexpected things could happen if each cpu
        has a different ldt setting and one cpu tries to use value
        of currentldt set by another cpu.

        The fix is to move currentldt to the per-cpu area. It includes
        patches I filed in PR i386/6219 which are also user ldt related.

PR:		i386/7591, i386/6219
Submitted by:	Luoqi Chen <luoqi@watermarkgroup.com>
1998-08-18 07:47:12 +00:00
Bruce Evans
69ed480f48 pmap.c:
Cast pointers to (vm_offset_t) instead of to (u_long) (as before) or to
(uintptr_t)(void *) (as would be more correct).  Don't cast vm_offset_t's
to (u_long) just to do arithmetic on them.

mp_machdep.c:
Cast pointers to (uintptr_t) instead of to (u_long).  Don't forget
to cast pointers to (void *) first or to recover from integral
possible integral promotions, although this is too much work for
machine-dependent code.

vm code generally avoids warnings for pointer vs long size mismatches
by using vm_offset_t to represent pointers; pmap.c often uses plain
`unsigned int' instead of vm_offset_t and didn't use u_long elsewhere,
but this style was messed up by code apparently imported from mp_machdep.c.
1998-08-16 00:41:40 +00:00
Tor Egge
2f1e70693d Add forwarding of roundrobin to other cpus. This gives a more regular
update of cpu usage as shown by top when one process is cpu bound
(no system calls) while the system is otherwise idle (except for top).

Don't attempt to switch to the BSP in boot().  If the system was idle when
an interrupt caused a panic, this won't work.  Instead, switch to the BSP
in cpu_reset.

Remove some spurious forward_statclock/forward_hardclock warnings.
1998-05-17 22:12:14 +00:00
Tor Egge
5931a9c24e For SMP, use prv_PPAGE1/prv_PMAP1 instead of PADDR1/PMAP1.
get_ptbase and pmap_pte_quick no longer generates IPIs.
This should reduce the number of IPIs during heavy paging.
1998-05-17 18:53:19 +00:00
John Dyson
f0175db1ee Attempt to set write combining mode for graphics devices. 1998-05-11 01:06:08 +00:00
Peter Wemm
cf34ef61ee Use real types for the SMP pages being allocated rather than arrays of
ints.  Remove some no longer needed casts.  Initialize the per-cpu
global data area using the structs rather than knowing too much about
layout, alignment, etc.
1998-04-06 15:48:30 +00:00
Poul-Henning Kamp
4cf41af3d4 Make a kernel version of the timer* functions called timerval* to be
more consistent.

OK'ed by:	bde
1998-04-06 08:26:08 +00:00
Tor Egge
5758c2de94 Add two workarounds for broken MP tables:
- Attempt to handle PCI devices where the interrupt is
	  an ISA/EISA interrupt according to the mp table.

	- Attempt to handle multiple IO APIC pins connected to
	  the same PCI or ISA/EISA interrupt source.  Print a
	  warning if this happens, since performance is suboptimal.
	  This workaround is only used for PCI devices.

With these two workarounds, the -SMP kernel is capable of running on
my Asus P/I-P65UP5 motherboard when version 1.4 of the MP table is disabled.
1998-04-01 21:07:37 +00:00
Tor Egge
1146c3560f The APs now reload the interrupt descriptor table pointer after
f00f_hack has run.

Use the global r_idt descriptor in f00f_hack when in SMP mode,
so the APs find the relocated interrupt descriptor table.

Submitted by:	Partially from David A Adkins <adkin003@tc.umn.edu>
1998-03-07 20:16:49 +00:00
Tor Egge
02c1dc3bbc When entering the apic version of slow interrupt handler, level
interrupts are masked, and EOI is sent iff the corresponding ISR bit
is set in the local apic. If the CPU cannot obtain the interrupt
service lock (currently the global kernel lock) the interrupt is
forwarded to the CPU holding that lock.

Clock interrupts now have higher priority than other slow interrupts.
1998-03-03 22:56:30 +00:00
Tor Egge
3163861c7b Forward the signal if the process runs on a different CPU. This reduces
the signal handling latency for cpu-bound processes that performs very
few system calls.

The IPI for forcing an additional software trap is no longer dependent upon
BETTER_CLOCK being defined.
1998-03-03 20:55:26 +00:00
Tor Egge
fe9cd27373 Reduce timeout before assuming that forwarding of hardclock or softclock
failed. Don't complain on forwarding failure, unless
BETTER_CLOCK_DIAGNOSTIC is defined.
1998-03-03 20:09:14 +00:00
John Dyson
ffc82b0a70 1) Use a more consistent page wait methodology.
2)	Do not unnecessarily force page blocking when paging
	pages out.
3)	Further improve swap pager performance and correctness,
	including fixing the paging in progress deadlock (except
	in severe I/O error conditions.)
4)	Enable vfs_ioopt=1 as a default.
5)	Fix and enable the page prezeroing in SMP mode.

All in all, SMP systems especially should show a significant
improvement in "snappyness."
1998-03-01 04:18:54 +00:00
Eivind Eklund
303b270b0a Staticize. 1998-02-09 06:11:36 +00:00
Tor Egge
5c623cb649 Add support for low resolution SMP kernel profiling.
- A nonprofiling version of s_lock (called s_lock_np) is used
    by mcount.

  - When profiling is active, more registers are clobbered in
    seemingly simple assembly routines. This means that some
    callers needed to save/restore extra registers.

  - The stack pointer must have space for a 'fake' return address
    in idle, to avoid stack underflow.
1997-12-15 02:18:35 +00:00
Tor Egge
549a42942d Don't forward hardclock or statclock to stopped cpus. Disable forwarding
when a panic has occured.
1997-12-15 01:14:10 +00:00
Tor Egge
80db913bd6 Add needed #include.
Problem found by: Bruce Evans <bde@zeta.org.au>
1997-12-12 21:45:23 +00:00
Steve Passe
eae8fc2c8a The improvements to clock statistics by Tor Egge
Wrappered and enabled by the define BETTER_CLOCK (on by default in smpyests.h)

Reviewed by:	smp@csn.net
Submitted by:	Tor Egge <Tor.Egge@idi.ntnu.no>
1997-12-08 23:00:24 +00:00
Tor Egge
31e5225482 Use UPAGES when setting up private pages for SMP (which includes idle stack). 1997-11-07 19:58:34 +00:00
Bruce Evans
55b211e3af Removed unused #includes. 1997-10-28 15:59:26 +00:00
Peter Wemm
0c111a5c17 Try and fix some style problems 1997-10-12 15:24:39 +00:00
Peter Wemm
98823b2366 Convert the VM86 option from a global option to an option only depended
on by the files that use it.  Changing the VM86 option now only causes
a recompile of a dozen files or so rather than the entire kernel.
1997-10-10 09:44:12 +00:00
John Dyson
42c0de4926 It is possible that MB's with really broken bios's not set up more of
the mtrr registers.  This just fills in more of the registers.
1997-10-06 02:11:32 +00:00
John Dyson
c63ba9f5ae Make sure that the memory type registers are the same for each CPU
in a P6 SMP system.  Some MB bios'es don't set the registers up correctly
for the AP's.  Additionally, set the memory between 0xa0000 and 0xbffff
as write combining.
1997-10-05 03:19:29 +00:00
Peter Wemm
dfd5aef3a8 Implement the parts needed for VM86 under SMP. 1997-09-21 15:03:59 +00:00
John Dyson
a65247e12c Add support for more than 1 page of idle process stack on SMP systems. 1997-09-21 05:50:02 +00:00
Steve Passe
20233f27f4 General cleanup of the lock pushdown code. They are grouped and enabled
from machine/smptests.h:

#define PUSHDOWN_LEVEL_1
#define PUSHDOWN_LEVEL_2
#define PUSHDOWN_LEVEL_3
#define PUSHDOWN_LEVEL_4_NOT
1997-09-07 22:04:09 +00:00
Steve Passe
7245dff0f1 Cleanup. 1997-09-01 07:31:54 +00:00
Bruce Evans
e28b96049b Move closer to supporting VM86 under SMP.
LINT now compiles but doesn't link.  Other link-time breakage for LINT
is now visible (SMP is incompatible with SIMPLELOCK_DEBUG).
Submitted by:	jlemon
1997-09-01 01:54:52 +00:00
Steve Passe
2645264a72 Debug version of simple_lock. This will store the CPU id of the
holding CPU along with the lock.  When a CPU fails to get the lock
it compares its own id to the holder id.  If they are the same it
panic()s, as simple locks are binary, and this would cause a deadlock.

Controlled by smptests.h: SL_DEBUG, ON by default.

Some minor cleanup.
1997-08-31 03:17:48 +00:00
Steve Passe
78292efeef Another round of lock pushdown.
Add a simplelock to deal with disable_intr()/enable_intr() as used in UP kernel.
UP kernel expects that this is enough to guarantee exclusive access to
regions of code bracketed by these 2 functions.
Add a simplelock to bracket clock accesses in clock.c: clock_lock.

Help from:	Bruce Evans <bde@zeta.org.au>
1997-08-30 08:08:10 +00:00
Peter Wemm
90bcb528a8 Correct some things I forgot about until it was too late with smp_active.
smp_active = 1 used to indicate that the system had frozen previously
started AP's, while smp_active = 0 was "AP's not yet started".  I have split
this into smp_started (which is set when the AP's come online), and
smp_active is left for turning on/off AP scheduling.
1997-08-26 18:36:15 +00:00
Peter Wemm
9a3b3e8bce Clean up the SMP AP bootstrap and eliminate the wretched idle procs.
- We now have enough per-cpu idle context, the real idle loop has been
revived (cpu's halt now with nothing to do).
- Some preliminary support for running some operations outside the
global lock (eg: zeroing "free but not yet zeroed pages") is present
but appears to cause problems.  Off by default.
- the smp_active sysctl now behaves differently. It's merely a 'true/false'
option.  Setting smp_active to zero causes the AP's to halt in the idle
loop and stop scheduling processes.
- bootstrap is a lot safer.  Instead of sharing a statically compiled in
stack a number of times (which has caused lots of problems) and then
abandoning it, we use the idle context to boot the AP's directly.  This
should help >2 cpu support since the bootlock stuff was in doubt.
- print physical apic id in traps.. helps identify private pages getting
out of sync.  (You don't want to know how much hair I tore out with this!)

More cleanup to follow, this is more of a checkpoint than a
'finished' thing.
1997-08-26 18:10:38 +00:00
Bruce Evans
2a2968a896 Removed a bogus comment. 1997-08-25 21:28:08 +00:00
Steve Passe
8ee0110a44 A clean fix for the spl "deadlock before smp_active" problem.
Added a new variable, 'bsp_apic_ready', which is set as soon as the bootstrap
CPU has initialized its local APIC.  Conditionalize the GENSPLR functions
to call ss_lock ONLY after bsp_apic_ready is TRUE;  This should prevent
any problems with races between the time the 1st AP becomes ready and the
time smp_active is set.
1997-08-24 20:33:32 +00:00
Steve Passe
4a73d99f7e Made PEND_INTS default.
Made NEW_STRATEGY default.
Removed misc. old cruft.

Centralized simple locks into mp_machdep.c
Centralized simple lock macros into param.h

More cleanup in the direction of making splxx()/cpl MP-safe.
1997-08-21 05:08:25 +00:00
Steve Passe
7b185ef809 Preperation for moving cpl into critical region access.
Several new fine-grained locks.
New FAST_INTR() methods:
 - separate simplelock for FAST_INTR, no more giant lock.
 - FAST_INTR()s no longer checks ipending on way out of ISR.
sio made MP-safe (I hope).
1997-08-20 05:25:48 +00:00
Steve Passe
cb02d4da35 Cheap fix for kern/4255.
If the problem is seen this fix suggests a compile-time work-around then panics.
1997-08-10 19:32:38 +00:00
Steve Passe
7acc960834 Some fixes towards making "default configs" work again.
Still not fixed, no idea why.

Debug help from: "Thomas D. Dean" <tomdean@ix.netcom.com>
1997-08-09 23:01:03 +00:00
Steve Passe
da9f018228 Converted the TEST_LOPRIO code to default.
Created mplock functions that save/restore NO registers.
Minor cleanup.
1997-07-31 05:43:05 +00:00
Steve Passe
412f3e4d71 Modified the PEND_INTS algorithm to fix the ISA INT loss problem.
Noticed by:	dave adkins <adkin003@gold.tc.umn.edu> and others.
1997-07-28 03:59:54 +00:00