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Commit Graph

3 Commits

Author SHA1 Message Date
Gerard Roudier
94d057fdf4 - Make the NVRAM debug code compile and work.
- Get rid of a fiew uselessly `long' variables
  and casts to `long'.
- Estimate the PCI clock for all chips, except
  C1010 for now (we should do that for each PCI BUS)
- Refine a couple of C1010 errata work-arounds.
- For now, make sure AIP generation is disabled
  for the C1010-66.
2000-05-28 17:49:18 +00:00
Gerard Roudier
4fafb9d657 Work-around a couple of C1010 quirks:
- Reload SCNTL3 after selection from host   (C1010-33).
- Reload SCNTL4 prior to any DATA OUT phase (C1010-66).
- Use max SCSI offset 31 for ST but 62 for DT.
2000-05-07 09:54:33 +00:00
Gerard Roudier
c5595f9dd0 This new version adds support for early NCR chips.
53C810 non 'A', 53C815 and 53C825 non 'A' are now
attached by the driver (by default).
The driver uses a different SCRIPTS set based on
MEMORY MOVE instructions for these chips.

2 SCRIPTS sets (firmwares) numbered #1 and #2 are
used for the whole support of the 53C8XX family
to get possible:

- FW #1 : Only based on MEMORY MOVE instructions.
          Selected for 810, 815, 825.
- FW #2 : LOAD/STORE based. This is the firmware
          also used by previous driver versions.
          Selected for other chips.

When both `ncr' and `sym' are configured, `sym'
will now attach all the 53C8XX devices by default.
Previous balancing between `ncr' and `sym' can be
preserved by:

- Either editing sym_conf.h and commenting the
  following compile option:
     #define SYM_CONF_GENERIC_SUPPORT
  (This also saves about 3.5Kb of kernel memory).

- Or setting kernel config option
    SYM_SETUP_LP_PROBE_MAP to 64 (bit 0x40)
2000-04-29 10:20:16 +00:00