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Commit Graph

8 Commits

Author SHA1 Message Date
Ryan Stone
9e60f3acd2 Fix Sandy Bridge+ hwpmc branch counters
On Sandy Bridge and later, to count branch-related events you
have to or together a mask indicating the type of branch
instruction to count (e.g. direct jump, branch, etc) and a bits
indicating whether to count taken and not-taken branches.  The
current counter definitions where defining this bits individually,
so the counters never worked and always just counted 0.

Fix the counter definitions to instead contain the proper
combination of masks.  Also update the man pages to reflect the
new counters.

Differential Revision:	https://reviews.freebsd.org/D1587
MFC after:	1 month
Sponsored by:	Sandvine Inc.
2015-03-10 01:23:47 +00:00
Joel Dahl
73461c24c4 mdoc: sort SEE ALSO. 2015-01-04 12:38:00 +00:00
Baptiste Daroussin
2b7af31cf5 use .Mt to mark up email addresses consistently (part3)
PR:		191174
Submitted by:	Franco Fichtner  <franco at lastsummer.de>
2014-06-23 08:23:05 +00:00
Bryan Venteicher
a83639a2e6 Add missing space
MFC after:	3 days
2013-03-27 07:11:29 +00:00
Sean Bruno
3f929d8cdd Update hwpmc to support the Xeon class of Ivybridge processors.
case 0x3E:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	davide, jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-01-31 22:09:53 +00:00
Sean Bruno
cdfd0cc862 Cleanup and rename some variables in libpmc and hwpmc.
Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris@ sbruno@
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2012-10-24 01:26:29 +00:00
Joel Dahl
ad2f1898bc Remove trailing whitespace. 2012-10-19 18:30:50 +00:00
Sean Bruno
fabe02f5f3 Update hwpmc to support the Xeon class of Sandybridge processors.
(Model 0x2D     /* Per Intel document 253669-044US 08/2012. */)

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris@ fabient@
Obtained from:	Yahoo! Inc.
MFC after:	  2 weeks
2012-10-19 17:01:27 +00:00