This is due to a bug that has been in there since Warneer did the
PCCARD stuff, the altioaddr is not offset 8 its offset 14 from
the base address.
Also only probe the master device, no known PCCARD ATA thingies
has a slave AFAIK..
<sys/proc.h> to <sys/systm.h>.
Correctly document the #includes needed in the manpage.
Add one now needed #include of <sys/systm.h>.
Remove the consequent 48 unused #includes of <sys/proc.h>.
write caching is disabled on both SCSI and IDE disks where large
memory dumps could take up to an hour to complete.
Taking an i386 scsi based system with 512MB of ram and timing (in
seconds) how long it took to complete a dump, the following results
were obtained:
Before: After:
WCE TIME WCE TIME
------------------ ------------------
1 141.820972 1 15.600111
0 797.265072 0 65.480465
Obtained from: Yahoo!
Reviewed by: peter
- Make softinterrupts (SWI's) almost completely MI, and divorce them
completely from the x86 hardware interrupt code.
- The ihandlers array is now gone. Instead, there is a MI shandlers array
that just contains SWI handlers.
- Most of the former machine/ipl.h files have moved to a new sys/ipl.h.
- Stub out all the spl*() functions on all architectures.
Submitted by: dfr
Add support for CMD 648 ATA66 & CMD 649 ATA100 chipsets.
Fix the "resource already allocated" panic with the CMD and other
braindead controllers.
Add options ATA_ENABLE_TAGS, without this option tagged queuing will
not be attempted.
IBM's DPTA and DTLA series of drives (no other disk vendors are known
to support this) on non-Promise controllers (promise controllers lockup
when given the tagged queuing specific commands).
It gives especially master/slave comboes about 5% better performance.
Add support for the Promise ATA100 OEM chip (pdc20265)
Add support for the Cyrix 5530
Change the way status is read from the drives, use the alternate
status reg when possible.
Better support for DEVFS, the acdXtY devices are now created when needed.
Lots of little cleanups.
newbus for referencing device interrupt handlers.
- Move the 'struct intrec' type which describes interrupt sources into
sys/interrupt.h instead of making it just be a x86 structure.
- Don't create 'ithd' and 'intrec' typedefs, instead, just use 'struct ithd'
and 'struct intrec'
- Move the code to translate new-bus interrupt flags into an interrupt thread
priority out of the x86 nexus code and into a MI ithread_priority()
function in sys/kern/kern_intr.c.
- Remove now-uneeded x86-specific headers from sys/dev/ata/ata-all.c and
sys/pci/pci_compat.c.
include:
* Mutual exclusion is used instead of spl*(). See mutex(9). (Note: The
alpha port is still in transition and currently uses both.)
* Per-CPU idle processes.
* Interrupts are run in their own separate kernel threads and can be
preempted (i386 only).
Partially contributed by: BSDi (BSD/OS)
Submissions by (at least): cp, dfr, dillon, grog, jake, jhb, sheldonh
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
which call busspace.
* Rework pci config accesses to route through the pcib device instead of
calling a MD function directly.
With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.
some of the fake devices sometimes seen on single device ATA
channels.
Proberly fail on failures in ata-disk.c, retry instead of hang.
Cleanup the VIA probe/init code a bit.
Fix a couble of missing free's in atapi-cd.c in the changer code.
This is done by misusing the device minor a bit to encode the
track no there.
So to read track #4 just use /dev/acdNt4 where N is the device #.
The driver no automatically sets the blocksize (sectorsize) to
what the track is set to in the TOC.
This has the nice effect that you can now rip audioi tracks
by simply doing:
dd if=/dev/acdNt2 of=audiotrack2.raw bs=2352
it cant be much simpler than that :)
NOTE: the original acdNa & acdNc device still work as usual,
except the blocksize is set according to track0.
Promise Ultra100 / Fasttrak100
HighPoint HPT370 controllers (fx Abit KA7-100 onboard ctrl, Abit HotRod 100)
Intel ICH2 (Intel 815E based motherboards)
So far I can read >90MB/s on the Promise and the HPT370.
I can write >64MB/s on the promise and >50MB/s on the HPT370 so it seems
writing is still done in ATA66 mode :(
The ICH2 support is untested as of yet...
need this RSN.
Remove a pointless warning in the root device locating code.
Remove the "wd" compatibility name from the "ad" driver.
WARNING: If you have not updated to use /dev/wd* in your /etc/fstab
and modern bootblocks, it would be a very good idea to do so BEFORE
you upgrade your kernel.
