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Commit Graph

128844 Commits

Author SHA1 Message Date
Hans Petter Selasky
7bf46a63ce Randomize the delay when waiting for VSC flag in mlx5core.
The PRM suggests random 0 - 10ms to prevent multiple waiters on the same
interval in order to avoid starvation.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:59:44 +00:00
Hans Petter Selasky
59efbf791d Wait for FW readiness before initializing command interface in mlx5core.
Before attempting to initialize the command interface we must wait till
the fw_initializing bit is clear.

If we fail to meet this condition the hardware will drop our
configuration, specifically the descriptors page address.  This scenario
can happen when the firmware is still executing an FLR flow and did not
finish yet so the driver needs to wait for that to finish.

Linux commits:
6c780a0267b8
b8a92577f4be.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:53:28 +00:00
Hans Petter Selasky
c84e0068ce Fix regression issue about bad refcounting of unlimited send tags
in mlx5en(4) after r348254.

The unlimited send tags are shared amount multiple connections and are
not allocated per send tag allocation request. Only increment the refcount.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:46:57 +00:00
Hans Petter Selasky
eeb1ff9800 Seal transmit path with regards to using destroyed mutex in mlx5en(4).
It may happen during link down that the running state may be observed
non-zero in the transmit routine, right before the running state is
cleared. This may end up using a destroyed mutex.

Make all channel mutexes and callouts persistant.

Preserve receive and send queue statistics during link toggle.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:43:49 +00:00
Hans Petter Selasky
b4672400e6 Remove unused cpu field from channel structure in mlx5en(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:26:26 +00:00
Hans Petter Selasky
a2d65bfd8f Remove mkey_be from channel structure in mlx5en(4).
Use value from priv structure instead.
This saves some space in the channel structure.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:25:47 +00:00
Hans Petter Selasky
3e40712eb0 Return an error from ioctl(MLX5_FW_RESET) if reset was rejected in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:24:13 +00:00
Hans Petter Selasky
96425f44c9 Add sysctl(8) to get and set forward error correction, FEC, configuration
in mlx5en(4).

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:22:15 +00:00
Hans Petter Selasky
048ddb58bc Move EEPROM information query from a sysctl in mlx5en(4) to an ioctl
in mlx5core. The EEPROM information is not only a property of the
mlx5en(4) driver.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:14:55 +00:00
Hans Petter Selasky
6deb0b1e94 Add support for buffer parameter manipulations in mlx5en(4).
The following sysctls are added:
dev.mce.N.conf.qos.cable_length
dev.mce.N.conf.qos.buffers_size
dev.mce.N.conf.qos.buffers_prio

Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:08:04 +00:00
Hans Petter Selasky
c28ef24918 Import Linux code to query/set buffer state in mlx5en(4).
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 10:05:34 +00:00
Hans Petter Selasky
d585ff62c4 Add mlx5e_dbg() compatibility macro.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:59:42 +00:00
Hans Petter Selasky
006ae571da Update definitons for PPTB and PBMC registers layouts in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:58:00 +00:00
Hans Petter Selasky
207ff00e26 Add definition for the Port Buffer Status Register in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:57:12 +00:00
Hans Petter Selasky
8ae1c36f8b Sort the ports registers definitions numerically in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:56:27 +00:00
Hans Petter Selasky
6b4040d8ff Unify prints in mlx5en(4).
All prints in mlx5en(4) should use on of the macros:
mlx5_en_err/dbg/warn

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:49:44 +00:00
Hans Petter Selasky
a2f4f59ca8 Unify prints in mlx5core.
All prints in mlx5core should use on of the macros:
mlx5_core_err/dbg/warn

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:48:01 +00:00
Hans Petter Selasky
c9bb26aef1 Add proper print in case of 0x0 health syndrome in mlx5core.
In case of health counter fails to increment it indicates a bad device health.
In case when the syndrome indicated by firmware is 0x0, this indicates that
firmware is unable to respond to initialization segment reads.
Add proper print in this case.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:46:14 +00:00
Hans Petter Selasky
95c05e056f Add missing blank line at the end of the print in mlx5core.
Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:45:07 +00:00
Hans Petter Selasky
4bc8507b82 Remove no longer needed fwdump register tables from mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:43:48 +00:00
Hans Petter Selasky
4745819044 Read rege map from crdump scan space in mlx5core.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:40:23 +00:00
Hans Petter Selasky
f29c160ef3 Define MLX5_VSC_DOMAIN_SCAN_CRSPACE.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:34:34 +00:00
Hans Petter Selasky
4d98df72cd Use the MLX5_VSC_DOMAIN_SEMAPHORES constant instead of hand-rolled symbol
in mlx5core.

Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:33:38 +00:00
Hans Petter Selasky
04910901bc Move mlx5_ifc_vsc_space_bits and mlx5_ifc_vsc_addr_bits to mlx5_ifc.h.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:32:41 +00:00
Hans Petter Selasky
e456decc55 Make the mlx5_vsc_wait_on_flag(9) function global.
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:31:36 +00:00
Hans Petter Selasky
111b57c359 Add port module event software counters in mlx5core.
While at it, fixup PME based on latest PRM defines.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:29:55 +00:00
Hans Petter Selasky
55221653c0 Correct and update some counter names in mlx5en(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:27:56 +00:00
Hans Petter Selasky
2110251a39 Export channel IRQ number as part of the "hw_ctx_debug" sysctl(8) in mlx5en(4).
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:27:08 +00:00
Hans Petter Selasky
6226306b47 Cleanup naming of IRQ vectors in mlx5en.
Remove unused IRQ naming functions and arrays.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:23:33 +00:00
Hans Petter Selasky
66b38bfe3d Add support for Multi-Physical Function Switch, MPFS, in mlx5en.
MPFS is a logical switch in the Mellanox device which forward packets
based on a hardware driven L2 address table, to one or more physical-
or virtual- functions. The physical- or virtual- function is required
to tell the MPFS by using the MPFS firmware commands, which unicast
MAC addresses it is requesting from the physical port's traffic.
Broadcast and multicast traffic however, is copied to all listening
physical- and virtual- functions and does not need a rule in the MPFS
switching table.

Linux commit:	eeb66cdb682678bfd1f02a4547e3649b38ffea7e
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:22:22 +00:00
Hans Petter Selasky
2db3dd5061 Implement macro for asserting priv lock in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:16:17 +00:00
Hans Petter Selasky
2e16440940 Fix for missing cleanup code in error case in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:15:07 +00:00
Hans Petter Selasky
53784e3632 Check return value of mlx5_vector2eqn() function in mlx5en.
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:14:01 +00:00
Hans Petter Selasky
8e773e55f4 Make sure the number of IRQ vectors doesn't exceed 256 in mlx5core.
The "intr" field in "struct mlx5_ifc_eqc_bits" is only 8 bits wide.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:12:53 +00:00
Hans Petter Selasky
b632492966 Update warning and error print formats in mlx5ib.
Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:11:01 +00:00
Hans Petter Selasky
c788dcead1 Fix reported max SGE calculation in mlx5ib.
Add the 512 bytes limit of RDMA READ and the size of remote address to the max
SGE calculation.

Submitted by:	slavash@
Linux commit:	288c01b746aa
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:09:28 +00:00
Hans Petter Selasky
6fe20cefa3 Make sure the transmit loop doesn't get starved in ipoib.
When the software send queue gets filled up, callbacks to
if_transmit will stop. Make sure the transmit callback
routine checks the send queue and outputs any remaining
mbufs. Else the remaining mbufs may simply sit in the
output queue blocking the transmit path.

MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:06:13 +00:00
Hans Petter Selasky
e8f206cc60 Notify all sleeping threads of device removal in krping.
Implement d_purge for krping_cdevsw.

Submitted by:	slavash@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
2019-10-02 09:03:48 +00:00
Kyle Evans
5a391b572b shm_open2(2): completely unbreak
kern_shm_open2(), since conception, completely fails to pass the mode along
to kern_shm_open(). This breaks most uses of it.

Add tests alongside this that actually check the mode of the returned
files.

PR:		240934 [pulseaudio breakage]
Reported by:	ler, Andrew Gierth [postgres breakage]
Diagnosed by:	Andrew Gierth (great catch)
Tested by:	ler, tmunro
Pointy hat to:	kevans
2019-10-02 02:37:34 +00:00
Emmanuel Vadot
150c95edfe generic_ehci: Enable all phys and resets
The number of phys and resets is not defined and it controller dependent
so enable/disable every one of them.
2019-10-01 22:20:03 +00:00
Emmanuel Vadot
fbf39b9767 arm: allwinner: a10_ehci: Enable all phys
Even if there should be only one phy enable all the ones declared in
the dts just to be sure.
2019-10-01 22:19:12 +00:00
Emmanuel Vadot
ecd012f975 arm: allwinner: a10_ehci: Look for the phy based on the id
phy-names was never in the bindings schema even if it was present
in some DTS. Get the optional phy based on its ID.

PR:		240978
2019-10-01 20:22:54 +00:00
Emmanuel Vadot
4dbb3f478b generic_ohci: Look for the phy based on the id
phy-names was never in the bindings schema even if it was present
in some DTS. Get the optional phy based on its ID.
2019-10-01 20:21:49 +00:00
Alexander Motin
e9f4580d92 Improve latency of synchronous 128KB writes.
Before my ZIL space optimization few years ago 128KB writes were logged
as two 64KB+ records in two 128KB log blocks.  After that change it became
~124KB+/4KB+ in two 128KB log blocks to free space in the second block
for another record.  Unfortunately in case of 128KB only writes, when space
in the second block remained unused, that change increased write latency by
imbalancing checksum computation time between parallel threads.

This change introduces new 68KB log block size, used for both writes below
67KB and 128KB-sharp writes.  Writes of 68-127KB are still using one 128KB
block to not increase processing overhead.  Writes above 131KB are still
using full 128KB blocks, since possible saving there is small.  Mixed loads
will likely also fall back to previous 128KB, since code uses maximum of
the last 10 requested block sizes.

On a simple 128KB write test with queue depth of 1 this change demonstrates
~15-20% performance improvement.

MFC after:	2 weeks
Sponsored by:	iXsystems, Inc.
2019-10-01 20:09:25 +00:00
Ian Lepore
044477e294 Add 8 and 16 bit versions of atomic_cmpset and atomic_fcmpset for arm.
This adds 8 and 16 bit versions of the cmpset and fcmpset functions. Macros
are used to generate all the flavors from the same set of instructions; the
macro expansion handles the couple minor differences between each size
variation (generating ldrexb/ldrexh/ldrex for 8/16/32, etc).

In addition to handling new sizes, the instruction sequences used for cmpset
and fcmpset are rewritten to be a bit shorter/faster, and the new sequence
will not return false when *dst==*old but the store-exclusive fails because
of concurrent writers. Instead, it just loops like ldrex/strex sequences
normally do until it gets a non-conflicted store. The manpage allows LL/SC
architectures to bogusly return false, but there's no reason to actually do
so, at least on arm.

Reviewed by:	cognet
2019-10-01 19:39:00 +00:00
Emmanuel Vadot
9f45d455d7 syr827: Switch to iicdev_{readfrom,writeto}
Also use IIC_INTRWAIT as we need this to work with the rockchip i2c driver.
2019-10-01 18:32:27 +00:00
Emmanuel Vadot
361a394828 arm64: rockchip: rk805: Switch to iicdev_{readfrom,writeto}
This simpify the code a bit.
2019-10-01 18:30:06 +00:00
Ed Maste
f403831e6c sysalls.master: remove superfluous ellipsis in comment
A single period is sufficient in this comment, and making this change
lets us find references to varargs syscalls by searching for ...
2019-10-01 17:05:21 +00:00
Alan Cox
ff7a11a2c7 In short, pmap_enter_quick_locked("user space", ..., VM_PROT_READ) doesn't
work.  More precisely, it doesn't set ATTR_AP(ATTR_AP_USER) in the page
table entry, so any attempt to read from the mapped page by user space
generates a page fault.  This problem has gone unnoticed because the page
fault handler, vm_fault(), will ultimately call pmap_enter(), which
replaces the non-working page table entry with one that has
ATTR_AP(ATTR_AP_USER) set.

This change reduces the number of page faults during a "buildworld" by
about 19.4%.

Reviewed by:	andrew, markj
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D21841
2019-10-01 15:33:47 +00:00
Ryan Stone
935dbbeb8b Clean up duplicate entries in sys/conf/files
Reviewed by:	imp
2019-10-01 13:36:01 +00:00