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Commit Graph

20 Commits

Author SHA1 Message Date
Marius Strobl
7bed9b320b - Add a workaround for a bug in BlackBird CPUs (said to be part of the
SpitFire erratum #54) which can cause writes to the TICK_CMPR register
  to fail. This seems to fix the dying clocks problem reported by jhb@
  and kris@. [1]
- In tick_start() don't reset the tick counter of the boot processor to
  zero. It's initially reset in _start() and afterwards but _before_
  tick_start() is called on the BSP the APs synchronise with the tick
  counter of the BSP in mp_startup(). Resetting the tick counter of the
  BSP in tick_start() probably also was the cause of problems seen when
  using the CPU tick counter as timecounter on SMP machines.
  Not resetting the tick counter of the BSP in mp_startup() makes the
  tick counters and tick interrupts between the BSP and APs be pretty
  much in sync as it's supposed to be. This also means there's no longer
  a real reason to have separate tick_start() and tick_start_ap() so
  merge them and zap tick_start_ap(). This is also a first step in
  simplifying the interface to the tick counters in preparation to use
  alternate clock hardware where available.
- Switch to the algorithm used on FreeBSD/ia64 for updating the tick
  interrupt register and which compensates the clock drift caused by
  varying delays between when the tick interrupts actually trigger and
  when they are serviced. Not compensating the clock drift mainly hurts
  interactive performance especially when using WITNESS. [2]
  For further information about the algorithm also see the commit log
  of sys/ia64/ia64/interrupt.c rev. 1.38.
  On sparc64 the sysctls for monitoring the behaviour of the tick
  interrupts are machdep.tick.adjust_edges, machdep.tick.adjust_excess,
  machdep.tick.adjust_missed and machdep.tick.adjust_ticks.
- In tick_init() just use tick_stop() for stopping the tick interrupts
  until a proper handler is set up later. This also stops the system
  tick interrupt on USIII systems earlier.
- In tick_start() check for a rough upper limit of HZ.
- Some minor changes, e.g. use FBSDID, remove unused headers, etc.

Info obtained from:	Linux [1]
Ok'ed by:		marcel [2]
Additional testing by:	kris (earlier version of the workaround), jhb
X-MFC after:		3 days [1]
2005-04-16 14:57:38 +00:00
Thomas Moestl
3e519a2cf4 Move the per-CPU vmspace pointer fixup that is required before a
struct vmspace is freed from cpu_sched_exit() to pmap_release().

This has the advantage of being able to rely on MI code to decide
when a free should occur, instead of having to inspect the reference
count ourselves.

At the same time, turn the per-CPU vmspace pointer into a pmap pointer,
so that pmap_release() can deal with pmaps exclusively.

Reviewed (and embrassing bug spotted) by: jake
2004-05-26 12:06:52 +00:00
Jake Burkholder
eb51ffcb6d Remove unused fields. 2003-03-18 08:15:24 +00:00
Jake Burkholder
b5d2ed3047 Store the number of itlb and dtlb entries separately; they may be different.
Find the prom node for the boot cpu earlier and store it in the per-cpu
area, so that cache_init can be called earlier.
2002-08-15 05:24:55 +00:00
Jake Burkholder
4d574756ac Convert the interrupt queue from an array to a linked list. Implement
intr_dequeue in asm so that it can easily be modified to do light weight
context switching.
2002-05-25 02:39:28 +00:00
Jake Burkholder
eb5b9c0be3 Add support for starting secondary cpus in kernel, as opposed to relying
on the loader to do it.  Improve smp startup code to be less racy and to
defer certain things until the right time.  This almost boots single user
on my dual ultra 60, it is still very fragile:

SMP: AP CPU #1 Launched!
Enter full pathname of shell or RETURN for /bin/sh:
# ls
Debugger("trapsig")
Stopped at      Debugger+0x1c:  ta              %xcc, 1
db> heh
No such command
db>
2002-03-04 07:12:36 +00:00
Jake Burkholder
5573db3f0b Allocate tlb contexts on the fly in cpu_switch, instead of statically 1 to 1
with pmaps.  When the context numbers wrap around we flush all user mappings
from the tlb.  This makes use of the array indexed by cpuid to allow a pmap
to have a different context number on a different cpu.  If the context numbers
are then divided evenly among cpus such that none are shared, we can avoid
sending tlb shootdown ipis in an smp system for non-shared pmaps.  This also
removes a limit of 8192 processes (pmaps) that could be active at any given
time due to running out of tlb contexts.

Inspired by:		the brown book
Crucial bugfix from:	tmm
2002-03-04 05:20:29 +00:00
Jake Burkholder
338f7e3e47 Add a md field to pcpu for the upa module id.
Remove the alt_stack field.
Use the defines for the register variables declared in C, so that they
don't get out of sync with the assembler.
2002-01-08 04:40:13 +00:00
John Baldwin
0bbc882680 Overhaul the per-CPU support a bit:
- The MI portions of struct globaldata have been consolidated into a MI
  struct pcpu.  The MD per-CPU data are specified via a macro defined in
  machine/pcpu.h.  A macro was chosen over a struct mdpcpu so that the
  interface would be cleaner (PCPU_GET(my_md_field) vs.
  PCPU_GET(md.md_my_md_field)).
- All references to globaldata are changed to pcpu instead.  In a UP kernel,
  this data was stored as global variables which is where the original name
  came from.  In an SMP world this data is per-CPU and ideally private to each
  CPU outside of the context of debuggers.  This also included combining
  machine/globaldata.h and machine/globals.h into machine/pcpu.h.
- The pointer to the thread using the FPU on i386 was renamed from
  npxthread to fpcurthread to be identical with other architectures.
- Make the show pcpu ddb command MI with a MD callout to display MD
  fields.
- The globaldata_register() function was renamed to pcpu_init() and now
  init's MI fields of a struct pcpu in addition to registering it with
  the internal array and list.
- A pcpu_destroy() function was added to remove a struct pcpu from the
  internal array and list.

Tested on:	alpha, i386
Reviewed by:	peter, jake
2001-12-11 23:33:44 +00:00
Jake Burkholder
4fd2757c37 Include a whole interrupt queue in struct globaldata instead of just a
pointer.  Minor style.
2001-10-20 15:57:09 +00:00
John Baldwin
fd54558a83 - If we ever do the per-cpu KTR stuff, the index won't be volatile as it
will be private to each CPU.
- Re-style(9) the globaldata structures.  There really needs to be a MI
  struct pcpu that has a MD struct mdpcpu member at some point.
2001-09-18 21:46:26 +00:00
Julian Elischer
b40ce4165d KSE Milestone 2
Note ALL MODULES MUST BE RECOMPILED
make the kernel aware that there are smaller units of scheduling than the
process. (but only allow one thread per process at this time).
This is functionally equivalent to teh previousl -current except
that there is a thread associated with each process.

Sorry john! (your next MFC will be a doosie!)

Reviewed by: peter@freebsd.org, dillon@freebsd.org

X-MFC after:    ha ha ha ha
2001-09-12 08:38:13 +00:00
Jake Burkholder
ce1e7a70b9 Move the alternate global register stack to struct globaldata. 2001-09-03 22:58:05 +00:00
Jake Burkholder
ef3df3f0fe Add variables needed by hardware watchpoint support.
Submitted by:	tmm
2001-08-20 23:50:48 +00:00
David E. O'Brien
589278dbae style(9) and make consistent across platforms 2001-08-16 09:29:35 +00:00
Jake Burkholder
0cb2d36969 Add fields that point to per-cpu interrupt data. 2001-08-10 04:18:48 +00:00
David E. O'Brien
73a4930297 The author isn't a [UC] Regents. Correct the copyright language. 2001-08-09 02:09:34 +00:00
Thomas Moestl
e64b70af32 Add floating point context switching code for sparc64.
Reviewed by:	jake
2001-08-04 18:55:15 +00:00
Jake Burkholder
89bf8575ee Flesh out the sparc64 port considerably. This contains:
- mostly complete kernel pmap support, and tested but currently turned
  off userland pmap support
- low level assembly language trap, context switching and support code
- fully implemented atomic.h and supporting cpufunc.h
- some support for kernel debugging with ddb
- various header tweaks and filling out of machine dependent structures
2001-07-31 06:05:05 +00:00
Jake Burkholder
98bb5304e1 Add skeleton machine dependent headers and c files for a port of freebsd
to a new architecture.  This is the base of the sparc64 port, but contains
limited machine dependent code, and can be used a base for ports.  Included
are:
- standard machine dependent headers, tweaked for a 64 bit, big endian
  architecture, including empty versions of all the machine dependent
  structures
- a machine independent atomic.h, which can be used until a port has
  support for interrupts and the operations really need to be atomic
- stub versions of all the machine dependent functions, which panic
  when called and print out the name of the function that needs to
  be implemented.  functions which are normally in assembly files are
  not included, but this should reduce the number of different undefined
  references on the first few compiles from hundreds to 5 or 6
Given minimal startup code and console support it should be trivial to
make this compile and run the first few sysinits on almost any architecture.

Requested by:   alfred, imp, jhb
2001-07-31 05:45:16 +00:00