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Add chvgpio(4) driver for Intel Z8xxx SoC family. This product was formerly known as Cherry Trail but Linux and OpenBSD drivers refer to it as Cherry View. This driver is derived from OpenBSD one so the name is kept for alignment with another BSD system. Submitted by: Tom Jones <tj@enoti.me> Reviewed by: gonzo, wblock(man page) MFC after: 2 weeks Differential Revision: https://reviews.freebsd.org/D13086
66 lines
2.2 KiB
Groff
66 lines
2.2 KiB
Groff
.\" Copyright (c) 2017
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.\" Tom Jones <tj@enoti.me> All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd November 17, 2017
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.Dt CHVGPIO 4
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.Os
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.Sh NAME
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.Nm chvgpio
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.Nd Intel Cherry View SoC GPIO controller
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.Sh SYNOPSIS
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.Cd "device gpio"
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.Cd "device chvgpio"
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.Sh DESCRIPTION
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.Nm
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supports the GPIO controller that can be found in Intel's Cherry View SoC
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family.
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.Pp
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The Cherry View SoC has 5 banks of GPIO pins, NORTH, EAST, SOUTHEAST, SOUTHWEST
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and VIRTUAL.
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All but VIRTUAL are exposed to userland as
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.Pa /dev/gpiocN ,
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where N is 0-3.
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Pins in each bank are pre-named to match names in the Intel® Atom™ Z8000
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Processor Series Vol 2
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.Sh SEE ALSO
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.Xr gpio 3 ,
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.Xr gpio 4 ,
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.Xr gpioctl 8
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.Rs
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.%T Intel® Atom™ Z8000 Processor Series Vol 1
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.Re
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.Rs
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.%T Intel® Atom™ Z8000 Processor Series Vol 2
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.Re
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.Sh HISTORY
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The
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.Nm
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manual page first appeared in
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.Fx 12 .
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.Sh AUTHORS
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This driver and man page were written by
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.An Tom Jones Aq Mt tj@enoti.me .
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