Neel Natu 02904c45ab Hide extended PerfCtr MSRs on AMD processors by clearing bits 23, 24 and 28 in ... CPUID.80000001H:ECX. Handle accesses to PerfCtrX and PerfEvtSelX MSRs by ignoring writes and returning 0 on reads. This further reduces the number of unimplemented MSRs hit by a Linux guest during boot.		2014-10-17 03:04:38 +00:00
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acpica	don't set CR4 PSE bit on amd64	2014-07-23 15:53:29 +00:00
amd64	IFC @r272887	2014-10-10 23:52:56 +00:00
conf	As per [1] Intel only supports this driver on 64bit platforms.	2014-09-23 08:33:03 +00:00
ia32	x86: Allow users to change PSL_RF via ptrace(PT_SETREGS...)	2013-11-14 15:37:20 +00:00
include	IFC @r272887	2014-10-10 23:52:56 +00:00
linux32	Re-gen after r271743 implementing most of	2014-09-18 08:40:00 +00:00
pci	Pull in r267961 and r267973 again. Fix for issues reported will follow.	2014-06-28 03:56:17 +00:00
vmm	Hide extended PerfCtr MSRs on AMD processors by clearing bits 23, 24 and 28 in	2014-10-17 03:04:38 +00:00
Makefile