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5fd2c51edb
recent changes (KSE and VM requiring physmem to be setup). Reviewed by: benno, jhb, julian
100 lines
3.0 KiB
C
100 lines
3.0 KiB
C
/*
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* Copyright (C) 1995-1997 Wolfgang Solfrank.
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* Copyright (C) 1995-1997 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $NetBSD: cpu.h,v 1.11 2000/05/26 21:19:53 thorpej Exp $
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* $FreeBSD$
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*/
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#ifndef _MACHINE_CPU_H_
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#define _MACHINE_CPU_H_
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#include <machine/frame.h>
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#include <machine/pcb.h>
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#include <machine/psl.h>
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#define CLKF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0)
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#define CLKF_BASEPRI(frame) ((frame)->pri == 0)
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#define CLKF_PC(frame) ((frame)->srr0)
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#define CLKF_INTR(frame) ((frame)->depth > 0)
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#define TRAPF_USERMODE(frame) ((frame)->srr1 & PSL_PR) != 0)
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#define TRAPF_PC(frame) ((frame)->srr0)
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#define cpu_swapout(p)
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#define cpu_number() 0
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extern void delay __P((unsigned));
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#define DELAY(n) delay(n)
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extern int want_resched;
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extern int astpending;
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extern char bootpath[];
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#if defined(_KERNEL) || defined(_STANDALONE)
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#define CACHELINESIZE 32
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#endif
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extern void __syncicache __P((void *, int));
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/*
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* CTL_MACHDEP definitions.
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*/
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#define CPU_CACHELINE 1
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#define CPU_MAXID 2
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#define CPU_CONSDEV 1
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#define CTL_MACHDEP_NAMES { \
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{ 0, 0 }, \
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{ "cachelinesize", CTLTYPE_INT }, \
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}
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static __inline u_int64_t
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get_cyclecount(void)
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{
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u_int32_t upper, lower;
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u_int64_t time;
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__asm __volatile(
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"mftb %0\n"
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"mftbu %1"
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: "=r" (lower), "=r" (upper));
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time = (u_int64_t)upper;
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time = (time << 32) + lower;
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return (time);
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}
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#define cpu_getstack(td) ((td)->td_frame->fixreg[1])
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void savectx __P((struct pcb *));
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#endif /* _MACHINE_CPU_H_ */
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