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311 lines
6.6 KiB
C
311 lines
6.6 KiB
C
/*-
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* Copyright (c) 2006 Benno Rice.
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* Copyright (C) 2007-2008 MARVELL INTERNATIONAL LTD.
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* All rights reserved.
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*
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* Adapted and extended to Marvell SoCs by Semihalf.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0_icu.c, rev 1
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/mv/mvreg.h>
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#include <arm/mv/mvvar.h>
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struct mv_ic_softc {
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struct resource * ic_res[1];
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bus_space_tag_t ic_bst;
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bus_space_handle_t ic_bsh;
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int ic_high_regs;
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int ic_error_regs;
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};
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static struct resource_spec mv_ic_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ -1, 0 }
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};
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static struct mv_ic_softc *mv_ic_sc = NULL;
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static int mv_ic_probe(device_t);
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static int mv_ic_attach(device_t);
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uint32_t mv_ic_get_cause(void);
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uint32_t mv_ic_get_mask(void);
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void mv_ic_set_mask(uint32_t);
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uint32_t mv_ic_get_cause_hi(void);
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uint32_t mv_ic_get_mask_hi(void);
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void mv_ic_set_mask_hi(uint32_t);
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uint32_t mv_ic_get_cause_error(void);
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uint32_t mv_ic_get_mask_error(void);
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void mv_ic_set_mask_error(uint32_t);
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static void arm_mask_irq_all(void);
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static int
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mv_ic_probe(device_t dev)
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{
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if (!ofw_bus_is_compatible(dev, "mrvl,pic"))
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return (ENXIO);
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device_set_desc(dev, "Marvell Integrated Interrupt Controller");
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return (0);
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}
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static int
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mv_ic_attach(device_t dev)
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{
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struct mv_ic_softc *sc;
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uint32_t dev_id, rev_id;
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int error;
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sc = (struct mv_ic_softc *)device_get_softc(dev);
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if (mv_ic_sc != NULL)
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return (ENXIO);
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mv_ic_sc = sc;
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soc_id(&dev_id, &rev_id);
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sc->ic_high_regs = 0;
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sc->ic_error_regs = 0;
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if (dev_id == MV_DEV_88F6281 ||
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dev_id == MV_DEV_88F6282 ||
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dev_id == MV_DEV_MV78100 ||
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dev_id == MV_DEV_MV78100_Z0)
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sc->ic_high_regs = 1;
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if (dev_id == MV_DEV_MV78100 || dev_id == MV_DEV_MV78100_Z0)
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sc->ic_error_regs = 1;
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error = bus_alloc_resources(dev, mv_ic_spec, sc->ic_res);
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if (error) {
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device_printf(dev, "could not allocate resources\n");
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return (ENXIO);
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}
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sc->ic_bst = rman_get_bustag(sc->ic_res[0]);
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sc->ic_bsh = rman_get_bushandle(sc->ic_res[0]);
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/* Mask all interrupts */
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arm_mask_irq_all();
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return (0);
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}
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static device_method_t mv_ic_methods[] = {
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DEVMETHOD(device_probe, mv_ic_probe),
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DEVMETHOD(device_attach, mv_ic_attach),
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{ 0, 0 }
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};
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static driver_t mv_ic_driver = {
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"ic",
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mv_ic_methods,
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sizeof(struct mv_ic_softc),
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};
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static devclass_t mv_ic_devclass;
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DRIVER_MODULE(ic, simplebus, mv_ic_driver, mv_ic_devclass, 0, 0);
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int
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arm_get_next_irq(int last)
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{
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u_int filt, irq;
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int next;
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filt = ~((last >= 0) ? (2 << last) - 1 : 0);
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irq = mv_ic_get_cause() & mv_ic_get_mask();
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if (irq & filt) {
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next = ffs(irq & filt) - 1;
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goto out;
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}
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if (mv_ic_sc->ic_high_regs) {
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filt = ~((last >= 32) ? (2 << (last - 32)) - 1 : 0);
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irq = mv_ic_get_cause_hi() & mv_ic_get_mask_hi();
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if (irq & filt) {
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next = ffs(irq & filt) + 31;
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goto out;
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}
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}
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if (mv_ic_sc->ic_error_regs) {
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filt = ~((last >= 64) ? (2 << (last - 64)) - 1 : 0);
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irq = mv_ic_get_cause_error() & mv_ic_get_mask_error();
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if (irq & filt) {
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next = ffs(irq & filt) + 63;
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goto out;
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}
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}
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next = -1;
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out:
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CTR3(KTR_INTR, "%s: last=%d, next=%d", __func__, last, next);
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return (next);
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}
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static void
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arm_mask_irq_all(void)
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{
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mv_ic_set_mask(0);
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if (mv_ic_sc->ic_high_regs)
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mv_ic_set_mask_hi(0);
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if (mv_ic_sc->ic_error_regs)
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mv_ic_set_mask_error(0);
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}
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void
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arm_mask_irq(uintptr_t nb)
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{
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uint32_t mr;
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if (nb < 32) {
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mr = mv_ic_get_mask();
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mr &= ~(1 << nb);
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mv_ic_set_mask(mr);
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} else if ((nb < 64) && mv_ic_sc->ic_high_regs) {
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mr = mv_ic_get_mask_hi();
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mr &= ~(1 << (nb - 32));
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mv_ic_set_mask_hi(mr);
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} else if ((nb < 96) && mv_ic_sc->ic_error_regs) {
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mr = mv_ic_get_mask_error();
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mr &= ~(1 << (nb - 64));
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mv_ic_set_mask_error(mr);
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}
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}
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void
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arm_unmask_irq(uintptr_t nb)
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{
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uint32_t mr;
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if (nb < 32) {
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mr = mv_ic_get_mask();
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mr |= (1 << nb);
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mv_ic_set_mask(mr);
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} else if ((nb < 64) && mv_ic_sc->ic_high_regs) {
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mr = mv_ic_get_mask_hi();
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mr |= (1 << (nb - 32));
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mv_ic_set_mask_hi(mr);
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} else if ((nb < 96) && mv_ic_sc->ic_error_regs) {
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mr = mv_ic_get_mask_error();
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mr |= (1 << (nb - 64));
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mv_ic_set_mask_error(mr);
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}
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}
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void
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mv_ic_set_mask(uint32_t val)
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{
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bus_space_write_4(mv_ic_sc->ic_bst, mv_ic_sc->ic_bsh,
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IRQ_MASK, val);
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}
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uint32_t
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mv_ic_get_mask(void)
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{
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return (bus_space_read_4(mv_ic_sc->ic_bst,
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mv_ic_sc->ic_bsh, IRQ_MASK));
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}
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uint32_t
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mv_ic_get_cause(void)
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{
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return (bus_space_read_4(mv_ic_sc->ic_bst,
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mv_ic_sc->ic_bsh, IRQ_CAUSE));
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}
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void
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mv_ic_set_mask_hi(uint32_t val)
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{
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bus_space_write_4(mv_ic_sc->ic_bst, mv_ic_sc->ic_bsh,
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IRQ_MASK_HI, val);
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}
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uint32_t
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mv_ic_get_mask_hi(void)
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{
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return (bus_space_read_4(mv_ic_sc->ic_bst,
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mv_ic_sc->ic_bsh, IRQ_MASK_HI));
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}
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uint32_t
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mv_ic_get_cause_hi(void)
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{
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return (bus_space_read_4(mv_ic_sc->ic_bst,
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mv_ic_sc->ic_bsh, IRQ_CAUSE_HI));
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}
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void
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mv_ic_set_mask_error(uint32_t val)
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{
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bus_space_write_4(mv_ic_sc->ic_bst, mv_ic_sc->ic_bsh,
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IRQ_MASK_ERROR, val);
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}
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uint32_t
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mv_ic_get_mask_error(void)
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{
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return (bus_space_read_4(mv_ic_sc->ic_bst,
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mv_ic_sc->ic_bsh, IRQ_MASK_ERROR));
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}
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uint32_t
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mv_ic_get_cause_error(void)
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{
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return (bus_space_read_4(mv_ic_sc->ic_bst,
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mv_ic_sc->ic_bsh, IRQ_CAUSE_ERROR));
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}
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