Marius Strobl ae3b789193 - Use the actual clock frequency of the PCI bus instead of assuming ... 33MHz for calculating the latency timer values for its children. Inspired by NetBSD doing the same and Linux as well as OpenSolaris using a similar approach. While at it rename a variable and change its type to be more appropriate fuer values of PCI properties so the variable can be more easily reused. - Initialize the cache line size register of PCI devices to a legal value; the cache line size is limited to 64 bytes by the Fireplane/Safari, JBus and UPA interconnection busses. Setting it to an unsupported value caused bad performance at least with GEM as it causes them to not do cache line bursts and to not issue cache line commands on the PCI bus. Approved by: re (kensmith) MFC after: 1 week		2007-09-26 20:10:36 +00:00
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central	Rototill the sparc64 nexus(4) (actually this brings in the code the	2007-03-07 21:13:51 +00:00
compile
conf	Use the correct expanded name for SCTP.	2007-09-26 20:05:07 +00:00
ebus	Set the rid for any resource obtained from rman_reserve_resource.	2006-04-20 04:20:41 +00:00
fhc	o Revamp the sparc64 interrupt code in order to be able to interface	2007-09-06 19:16:30 +00:00
include	Change the management of cached pages (PQ_CACHE) in two fundamental	2007-09-25 06:25:06 +00:00
isa	o break newbus api: add a new argument of type driver_filter_t to	2007-02-23 12:19:07 +00:00
pci	- Use the actual clock frequency of the PCI bus instead of assuming	2007-09-26 20:10:36 +00:00
sbus	o Revamp the sparc64 interrupt code in order to be able to interface	2007-09-06 19:16:30 +00:00
sparc64	- Move all of the PS_ flags into either p_flag or td_flags.	2007-09-17 05:31:39 +00:00