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d1d3233ebd
The following systems are affected:
- MPC8555CDS
- MPC8572DS
This overhaul covers the following major changes:
- All integrated peripherals drivers for Freescale MPC85XX SoC, which are
currently in the FreeBSD source tree are reworked and adjusted so they
derive config data out of the device tree blob (instead of hard coded /
tabelarized values).
- This includes: LBC, PCI / PCI-Express, I2C, DS1553, OpenPIC, TSEC, SEC,
QUICC, UART, CFI.
- Thanks to the common FDT infrastrucutre (fdtbus, simplebus) we retire
ocpbus(4) driver, which was based on hard-coded config data.
Note that world for these platforms has to be built WITH_FDT.
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
148 lines
3.9 KiB
C
148 lines
3.9 KiB
C
/*-
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* Copyright (c) 2006 Marcel Moolenaar
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/ofw_machdep.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/uart/uart.h>
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#include <dev/uart/uart_cpu.h>
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bus_space_tag_t uart_bus_space_io = &bs_le_tag;
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bus_space_tag_t uart_bus_space_mem = &bs_le_tag;
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int
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uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
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{
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return ((pmap_kextract(b1->bsh) == pmap_kextract(b2->bsh)) ? 1 : 0);
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}
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static int
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ofw_get_uart_console(phandle_t opts, phandle_t *result, const char *inputdev,
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const char *outputdev)
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{
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char buf[64];
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phandle_t input;
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if (OF_getprop(opts, inputdev, buf, sizeof(buf)) == -1)
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return (ENXIO);
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input = OF_finddevice(buf);
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if (input == -1)
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return (ENXIO);
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if (OF_getprop(opts, outputdev, buf, sizeof(buf)) == -1)
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return (ENXIO);
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if (OF_finddevice(buf) != input)
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return (ENXIO);
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*result = input;
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return (0);
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}
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int
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uart_cpu_getdev(int devtype, struct uart_devinfo *di)
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{
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char buf[64];
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struct uart_class *class;
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phandle_t input, opts;
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int error;
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class = &uart_z8530_class;
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if (class == NULL)
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return (ENXIO);
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if ((opts = OF_finddevice("/options")) == -1)
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return (ENXIO);
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switch (devtype) {
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case UART_DEV_CONSOLE:
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if (ofw_get_uart_console(opts, &input, "input-device",
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"output-device")) {
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/*
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* At least some G5 Xserves require that we
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* probe input-device-1 as well
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*/
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if (ofw_get_uart_console(opts, &input, "input-device-1",
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"output-device-1"))
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return (ENXIO);
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}
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break;
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case UART_DEV_DBGPORT:
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if (!getenv_string("hw.uart.dbgport", buf, sizeof(buf)))
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return (ENXIO);
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input = OF_finddevice(buf);
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if (input == -1)
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return (ENXIO);
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break;
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default:
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return (EINVAL);
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}
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if (OF_getprop(input, "device_type", buf, sizeof(buf)) == -1)
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return (ENXIO);
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if (strcmp(buf, "serial") != 0)
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return (ENXIO);
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if (OF_getprop(input, "name", buf, sizeof(buf)) == -1)
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return (ENXIO);
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if (strcmp(buf, "ch-a") == 0) {
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class = &uart_z8530_class;
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di->bas.regshft = 4;
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di->bas.chan = 1;
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} else if (strcmp(buf,"serial") == 0) {
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class = &uart_ns8250_class;
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di->bas.regshft = 0;
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di->bas.chan = 0;
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} else
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return (ENXIO);
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error = OF_decode_addr(input, 0, &di->bas.bst, &di->bas.bsh);
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if (error)
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return (error);
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di->ops = uart_getops(class);
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if (OF_getprop(input, "clock-frequency", &di->bas.rclk,
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sizeof(di->bas.rclk)) == -1)
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di->bas.rclk = 230400;
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if (OF_getprop(input, "current-speed", &di->baudrate,
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sizeof(di->baudrate)) == -1)
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di->baudrate = 0;
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di->databits = 8;
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di->stopbits = 1;
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di->parity = UART_PARITY_NONE;
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return (0);
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}
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