mirror of
https://git.FreeBSD.org/src.git
synced 2024-12-23 11:18:54 +00:00
a4539b3e56
o Offset and period in synch messages and width negotiation should be done for per target not per lun. Move these from *lun_info to *targ_info. o Change in handling XPT_RESET_DEV and XPT_GET_TRAN_SETTINGS . o Change CAM_* xpt_done return values. o Busy loop did not timeout. Change this to timeout as original NetBSD/pc98. Reviewed by: bsd-nomads ML
1281 lines
30 KiB
C
1281 lines
30 KiB
C
/* $FreeBSD$ */
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/* $NecBSD: nsp.c,v 1.21 1999/07/23 21:00:05 honda Exp $ */
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/* $NetBSD$ */
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#define NSP_DEBUG
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#define NSP_STATICS
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/*
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* Copyright (c) 1998
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* NetBSD/pc98 porting staff. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/disklabel.h>
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#if defined(__FreeBSD__) && __FreeBSD_version > 500001
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#include <sys/bio.h>
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#endif
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#include <sys/buf.h>
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#include <sys/queue.h>
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#include <sys/malloc.h>
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#include <sys/device_port.h>
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#include <sys/errno.h>
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#include <vm/vm.h>
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#ifdef __NetBSD__
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsiconf.h>
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#include <dev/scsipi/scsi_disk.h>
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#include <machine/dvcfg.h>
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#include <machine/physio_proc.h>
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#include <i386/Cbus/dev/scsi_low.h>
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#include <i386/Cbus/dev/nspreg.h>
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#include <i386/Cbus/dev/nspvar.h>
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#endif /* __NetBSD__ */
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#ifdef __FreeBSD__
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#include <machine/clock.h>
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#define delay(time) DELAY(time)
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#include <machine/cpu.h>
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#include <machine/bus_pio.h>
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#include <machine/bus_memio.h>
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#include <machine/bus.h>
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#include <machine/dvcfg.h>
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#include <machine/physio_proc.h>
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#include <cam/scsi/scsi_low.h>
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#include <dev/nsp/nspreg.h>
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#include <dev/nsp/nspvar.h>
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#if __FreeBSD_version < 400001
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#include "nsp.h"
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struct nsp_softc *nspdata[NNSP];
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#endif
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#endif /* __FreeBSD__ */
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/***************************************************
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* USER SETTINGS
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***************************************************/
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/* DEVICE CONFIGURATION FLAGS (MINOR)
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*
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* 0x01 DISCONECT OFF
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* 0x02 PARITY LINE OFF
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* 0x04 IDENTIFY MSG OFF ( = single lun)
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* 0x08 SYNC TRANSFER OFF
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*/
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/***************************************************
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* PARAMS
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***************************************************/
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#define NSP_NTARGETS 8
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#define NSP_NLUNS 8
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#define NSP_SELTIMEOUT 200
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/***************************************************
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* DEBUG
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***************************************************/
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#ifndef DDB
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#define Debugger() panic("should call debugger here (nsp.c)")
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#else /* ! DDB */
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#ifdef __FreeBSD__
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#define Debugger() Debugger("nsp")
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#endif /* __FreeBSD__ */
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#endif
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#ifdef NSP_DEBUG
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int nsp_debug;
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#endif /* NSP_DEBUG */
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#ifdef NSP_STATICS
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struct nsp_statics {
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int disconnect;
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int reselect;
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int data_phase_bypass;
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} nsp_statics[NSP_NTARGETS];
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#endif /* NSP_STATICS */
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/***************************************************
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* ISA DEVICE STRUCTURE
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***************************************************/
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extern struct cfdriver nsp_cd;
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/**************************************************************
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* DECLARE
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**************************************************************/
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#ifdef __NetBSD__
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extern int delaycount;
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#endif
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/* static */
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static void nsp_pio_read __P((struct nsp_softc *, struct targ_info *));
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static void nsp_pio_write __P((struct nsp_softc *, struct targ_info *));
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static int nsp_xfer __P((struct nsp_softc *, u_int8_t *, int, int));
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static int nsp_msg __P((struct nsp_softc *, struct targ_info *, u_int));
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static int nsp_reselected __P((struct nsp_softc *));
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static __inline int nsp_disconnected __P((struct nsp_softc *, struct targ_info *));
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static __inline void nsp_pdma_end __P((struct nsp_softc *, struct targ_info *));
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static void nsphw_init __P((struct nsp_softc *));
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static int nsp_nexus __P((struct nsp_softc *, struct targ_info *));
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static int nsp_world_start __P((struct nsp_softc *, int));
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static int nsphw_start_selection __P((struct nsp_softc *sc, struct slccb *));
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static void nsphw_bus_reset __P((struct nsp_softc *));
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static void nsphw_attention __P((struct nsp_softc *));
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static u_int nsp_fifo_count __P((struct nsp_softc *));
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static int nsp_negate_signal __P((struct nsp_softc *, u_int8_t, u_char *));
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static int nsp_expect_signal __P((struct nsp_softc *, u_int8_t, u_int8_t));
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static __inline void nsp_start_timer __P((struct nsp_softc *, int));
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static int nsp_dataphase_bypass __P((struct nsp_softc *, struct targ_info *));
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static void nsp_setup_fifo __P((struct nsp_softc *, int));
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static int nsp_targ_init __P((struct nsp_softc *, struct targ_info *));
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struct scsi_low_funcs nspfuncs = {
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SC_LOW_INIT_T nsp_world_start,
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SC_LOW_BUSRST_T nsphw_bus_reset,
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SC_LOW_TARG_INIT_T nsp_targ_init,
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SC_LOW_SELECT_T nsphw_start_selection,
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SC_LOW_NEXUS_T nsp_nexus,
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SC_LOW_ATTEN_T nsphw_attention,
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SC_LOW_MSG_T nsp_msg,
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SC_LOW_POLL_T nspintr,
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NULL,
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};
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/****************************************************
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* hwfuncs
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****************************************************/
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static __inline u_int8_t nsp_cr_read_1 __P((bus_space_tag_t bst, bus_space_handle_t bsh, bus_addr_t ofs));
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static __inline void nsp_cr_write_1 __P((bus_space_tag_t bst, bus_space_handle_t bsh, bus_addr_t ofs, u_int8_t va));
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static __inline u_int8_t
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nsp_cr_read_1(bst, bsh, ofs)
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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bus_addr_t ofs;
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{
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bus_space_write_1(bst, bsh, nsp_idxr, ofs);
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return bus_space_read_1(bst, bsh, nsp_datar);
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}
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static __inline void
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nsp_cr_write_1(bst, bsh, ofs, va)
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bus_space_tag_t bst;
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bus_space_handle_t bsh;
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bus_addr_t ofs;
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u_int8_t va;
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{
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bus_space_write_1(bst, bsh, nsp_idxr, ofs);
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bus_space_write_1(bst, bsh, nsp_datar, va);
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}
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static int
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nsp_expect_signal(sc, curphase, mask)
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struct nsp_softc *sc;
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u_int8_t curphase, mask;
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{
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struct scsi_low_softc *slp = &sc->sc_sclow;
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bus_space_tag_t bst = sc->sc_iot;
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bus_space_handle_t bsh = sc->sc_ioh;
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int wc = (sc->sc_wc >> 2);
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u_int8_t ph, isrc;
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int rv = -1;
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do
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{
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ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
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if (ph == 0xff) {
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rv = -1;
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break;
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}
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isrc = bus_space_read_1(bst, bsh, nsp_irqsr);
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if (isrc & IRQSR_SCSI) {
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rv = 0;
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break;
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}
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if ((ph & mask) != 0 && (ph & SCBUSMON_PHMASK) == curphase) {
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rv = 1;
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break;
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}
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}
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while (wc -- > 0);
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if (wc <= 0) {
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printf("%s: nsp_expect_signal timeout\n", slp->sl_xname);
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rv = -1;
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}
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return rv;
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}
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static void
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nsphw_init(sc)
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struct nsp_softc *sc;
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{
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bus_space_tag_t bst = sc->sc_iot;
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bus_space_handle_t bsh = sc->sc_ioh;
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/* block all interrupts */
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bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_ALLMASK);
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/* setup SCSI interface */
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bus_space_write_1(bst, bsh, nsp_ifselr, IFSELR_IFSEL);
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nsp_cr_write_1(bst, bsh, NSPR_SCIENR, 0);
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nsp_cr_write_1(bst, bsh, NSPR_XFERMR, XFERMR_IO8);
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nsp_cr_write_1(bst, bsh, NSPR_CLKDIVR, sc->sc_iclkdiv);
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nsp_cr_write_1(bst, bsh, NSPR_SCIENR, sc->sc_icr);
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nsp_cr_write_1(bst, bsh, NSPR_PARITYR, 0);
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nsp_cr_write_1(bst, bsh, NSPR_PTCLRR,
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PTCLRR_ACK | PTCLRR_REQ | PTCLRR_HOST | PTCLRR_RSS);
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/* setup fifo asic */
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bus_space_write_1(bst, bsh, nsp_ifselr, IFSELR_REGSEL);
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nsp_cr_write_1(bst, bsh, NSPR_TERMPWRC, 0);
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if ((nsp_cr_read_1(bst, bsh, NSPR_OCR) & OCR_TERMPWRS) == 0)
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nsp_cr_write_1(bst, bsh, NSPR_TERMPWRC, TERMPWRC_POWON);
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nsp_cr_write_1(bst, bsh, NSPR_XFERMR, XFERMR_IO8);
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nsp_cr_write_1(bst, bsh, NSPR_CLKDIVR, sc->sc_clkdiv);
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nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
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nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
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nsp_cr_write_1(bst, bsh, NSPR_SYNCR, 0);
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nsp_cr_write_1(bst, bsh, NSPR_ACKWIDTH, 0);
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/* enable interrupts and ack them */
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nsp_cr_write_1(bst, bsh, NSPR_SCIENR, SCIENR_SCCHG | SCIENR_RESEL | SCIENR_RST);
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bus_space_write_1(bst, bsh, nsp_irqcr, IRQSR_MASK);
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nsp_setup_fifo(sc, 0);
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}
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/****************************************************
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* scsi low interface
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****************************************************/
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static void
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nsphw_attention(sc)
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struct nsp_softc *sc;
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{
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bus_space_tag_t bst = sc->sc_iot;
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bus_space_handle_t bsh = sc->sc_ioh;
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u_int8_t cr;
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cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR)/* & ~SCBUSCR_ACK */;
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nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr | SCBUSCR_ATN);
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}
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static void
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nsphw_bus_reset(sc)
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struct nsp_softc *sc;
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{
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bus_space_tag_t bst = sc->sc_iot;
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bus_space_handle_t bsh = sc->sc_ioh;
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int i;
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bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_ALLMASK);
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nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, SCBUSCR_RST);
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delay(100 * 1000); /* 100ms */
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nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, 0);
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for (i = 0; i < 5; i ++)
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(void) nsp_cr_read_1(bst, bsh, NSPR_IRQPHS);
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bus_space_write_1(bst, bsh, nsp_irqcr, IRQSR_MASK);
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}
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static __inline void
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nsp_start_timer(sc, time)
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struct nsp_softc *sc;
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int time;
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{
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bus_space_tag_t bst = sc->sc_iot;
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bus_space_handle_t bsh = sc->sc_ioh;
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sc->sc_timer = time;
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nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, time);
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}
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static int
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nsphw_start_selection(sc, cb)
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struct nsp_softc *sc;
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struct slccb *cb;
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{
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struct scsi_low_softc *slp = &sc->sc_sclow;
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bus_space_tag_t bst = sc->sc_iot;
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bus_space_handle_t bsh = sc->sc_ioh;
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struct targ_info *ti = cb->ti;
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register u_int8_t arbs, ph;
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int s, wc = sc->sc_wc;
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/* check bus free */
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if (slp->sl_disc > 0)
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{
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s = splhigh();
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ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
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if (ph != SCBUSMON_FREE)
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{
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splx(s);
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return SCSI_LOW_START_FAIL;
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}
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splx(s);
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}
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/* start arbitration */
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SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
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nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_EXEC);
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do
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{
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/* XXX: what a stupid chip! */
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arbs = nsp_cr_read_1(bst, bsh, NSPR_ARBITS);
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delay(1);
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}
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while ((arbs & (ARBITS_WIN | ARBITS_FAIL)) == 0 && wc -- > 0);
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if ((arbs & ARBITS_WIN) == 0)
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{
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nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_CLR);
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return SCSI_LOW_START_FAIL;
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}
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/* assert select line */
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SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
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scsi_low_arbit_win(slp, ti);
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delay(3);
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nsp_cr_write_1(bst, bsh, NSPR_DATA,
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sc->sc_idbit | (1 << ti->ti_id));
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nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
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SCBUSCR_SEL | SCBUSCR_BSY | sc->sc_busc);
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delay(3);
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nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, SCBUSCR_SEL |
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SCBUSCR_BSY | SCBUSCR_DOUT | sc->sc_busc);
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nsp_cr_write_1(bst, bsh, NSPR_ARBITS, ARBITS_CLR);
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delay(3);
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nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
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SCBUSCR_SEL | SCBUSCR_DOUT | sc->sc_busc);
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/* check selection timeout */
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nsp_start_timer(sc, 1000 / 51);
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sc->sc_seltout = 1;
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return SCSI_LOW_START_OK;
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}
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static int
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nsp_world_start(sc, fdone)
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struct nsp_softc *sc;
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int fdone;
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{
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struct scsi_low_softc *slp = &sc->sc_sclow;
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#ifdef __FreeBSD__
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intrmask_t s;
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s = splcam();
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#endif
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sc->sc_cnt = 0;
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sc->sc_seltout = 0;
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if ((slp->sl_cfgflags & CFG_NOATTEN) == 0)
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sc->sc_busc = SCBUSCR_ATN;
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else
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sc->sc_busc = 0;
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sc->sc_icr = (SCIENR_SCCHG | SCIENR_RESEL | SCIENR_RST);
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nsphw_init(sc);
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scsi_low_bus_reset(slp);
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#ifdef __FreeBSD__
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splx(s);
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#endif
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SOFT_INTR_REQUIRED(slp);
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return 0;
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}
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struct ncp_synch_data {
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u_int min_period;
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u_int max_period;
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u_int chip_period;
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u_int ack_width;
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};
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static struct ncp_synch_data ncp_sync_data_40M[] = {
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{0x0c,0x0c,0x1,0}, /* 20MB 50ns*/
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{0x19,0x19,0x3,1}, /* 10MB 100ns*/
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{0x1a,0x25,0x5,2}, /* 7.5MB 150ns*/
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{0x26,0x32,0x7,3}, /* 5MB 200ns*/
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{0x0, 0, 0, 0}
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};
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static struct ncp_synch_data ncp_sync_data_20M[] = {
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{0x19,0x19,0x1,0}, /* 10MB 100ns*/
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{0x1a,0x25,0x2,0}, /* 7.5MB 150ns*/
|
|
{0x26,0x32,0x3,1}, /* 5MB 200ns*/
|
|
{0x0, 0, 0, 0}
|
|
};
|
|
|
|
static int
|
|
nsp_msg(sc, ti, msg)
|
|
struct nsp_softc *sc;
|
|
struct targ_info *ti;
|
|
u_int msg;
|
|
{
|
|
struct ncp_synch_data *sdp;
|
|
struct nsp_targ_info *nti = (void *) ti;
|
|
u_int period, offset;
|
|
int i;
|
|
|
|
if ((msg & SCSI_LOW_MSG_SYNCH) == 0)
|
|
return 0;
|
|
|
|
period = ti->ti_maxsynch.period;
|
|
offset = ti->ti_maxsynch.offset;
|
|
if (sc->sc_iclkdiv == CLKDIVR_20M)
|
|
sdp = &ncp_sync_data_20M[0];
|
|
else
|
|
sdp = &ncp_sync_data_40M[0];
|
|
|
|
for (i = 0; sdp->max_period != 0; i ++, sdp ++)
|
|
{
|
|
if (period >= sdp->min_period && period <= sdp->max_period)
|
|
break;
|
|
}
|
|
|
|
if (period != 0 && sdp->max_period == 0)
|
|
{
|
|
/*
|
|
* NO proper period/offset found,
|
|
* Retry neg with the target.
|
|
*/
|
|
ti->ti_maxsynch.period = 0;
|
|
ti->ti_maxsynch.offset = 0;
|
|
nti->nti_reg_syncr = 0;
|
|
nti->nti_reg_ackwidth = 0;
|
|
return EINVAL;
|
|
}
|
|
|
|
nti->nti_reg_syncr = (sdp->chip_period << SYNCR_PERS) |
|
|
(offset & SYNCR_OFFM);
|
|
nti->nti_reg_ackwidth = sdp->ack_width;
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
nsp_targ_init(sc, ti)
|
|
struct nsp_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct nsp_targ_info *nti = (void *) ti;
|
|
|
|
ti->ti_maxsynch.period = 200 / 4;
|
|
ti->ti_maxsynch.offset = 15;
|
|
nti->nti_reg_syncr = 0;
|
|
nti->nti_reg_ackwidth = 0;
|
|
return 0;
|
|
}
|
|
|
|
/**************************************************************
|
|
* General probe attach
|
|
**************************************************************/
|
|
int
|
|
nspprobesubr(iot, ioh, dvcfg)
|
|
bus_space_tag_t iot;
|
|
bus_space_handle_t ioh;
|
|
u_int dvcfg;
|
|
{
|
|
u_int8_t regv;
|
|
|
|
regv = bus_space_read_1(iot, ioh, nsp_fifosr);
|
|
if (regv < 0x11 || regv >= 0x20)
|
|
return 0;
|
|
return 1;
|
|
}
|
|
|
|
int
|
|
nspprint(aux, name)
|
|
void *aux;
|
|
const char *name;
|
|
{
|
|
|
|
if (name != NULL)
|
|
printf("%s: scsibus ", name);
|
|
return UNCONF;
|
|
}
|
|
|
|
void
|
|
nspattachsubr(sc)
|
|
struct nsp_softc *sc;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
|
|
printf("\n");
|
|
|
|
#ifdef __FreeBSD__
|
|
sc->sc_wc = 0x2000 * 2000; /* XXX need calibration */
|
|
#else
|
|
sc->sc_wc = delaycount * 2000; /* 2 sec */
|
|
#endif
|
|
sc->sc_idbit = (1 << slp->sl_hostid);
|
|
slp->sl_funcs = &nspfuncs;
|
|
if (sc->sc_memh != NULL)
|
|
sc->sc_xmode = NSP_MID_SMIT;
|
|
else
|
|
sc->sc_xmode = NSP_PIO;
|
|
|
|
(void) scsi_low_attach(slp, 2, NSP_NTARGETS, NSP_NLUNS,
|
|
sizeof(struct nsp_targ_info));
|
|
}
|
|
|
|
/**************************************************************
|
|
* PDMA functions
|
|
**************************************************************/
|
|
static u_int
|
|
nsp_fifo_count(sc)
|
|
struct nsp_softc *sc;
|
|
{
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
u_int count;
|
|
|
|
nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_PT);
|
|
count = bus_space_read_1(bst, bsh, nsp_datar);
|
|
count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 8);
|
|
count += (((u_int) bus_space_read_1(bst, bsh, nsp_datar)) << 16);
|
|
return count;
|
|
}
|
|
|
|
static void
|
|
nsp_setup_fifo(sc, on)
|
|
struct nsp_softc *sc;
|
|
int on;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
u_int8_t xfermode;
|
|
|
|
if (on != 0)
|
|
xfermode = XFERMR_XEN | XFERMR_FIFOEN;
|
|
else
|
|
xfermode = 0;
|
|
|
|
if ((slp->sl_scp.scp_datalen % DEV_BSIZE) != 0)
|
|
{
|
|
sc->sc_mask = 0;
|
|
xfermode |= XFERMR_IO8;
|
|
}
|
|
else
|
|
{
|
|
sc->sc_mask = 3;
|
|
if (sc->sc_xmode == NSP_MID_SMIT)
|
|
xfermode |= XFERMR_MEM32;
|
|
else
|
|
xfermode |= XFERMR_IO32;
|
|
}
|
|
|
|
sc->sc_xfermr = xfermode;
|
|
nsp_cr_write_1(bst, bsh, NSPR_XFERMR, sc->sc_xfermr);
|
|
}
|
|
|
|
static __inline void
|
|
nsp_pdma_end(sc, ti)
|
|
struct nsp_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
struct slccb *cb = ti->ti_nexus;
|
|
u_int len = 0, cnt;
|
|
|
|
slp->sl_flags &= ~HW_PDMASTART;
|
|
nsp_setup_fifo(sc, 0);
|
|
|
|
if (ti->ti_phase == PH_DATA)
|
|
{
|
|
cnt = nsp_fifo_count(sc);
|
|
if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
|
|
{
|
|
len = sc->sc_cnt - cnt;
|
|
if (slp->sl_scp.scp_datalen + len <=
|
|
cb->ccb_scp.scp_datalen)
|
|
{
|
|
slp->sl_scp.scp_data -= len;
|
|
slp->sl_scp.scp_datalen += len;
|
|
}
|
|
else
|
|
{
|
|
slp->sl_error |= PDMAERR;
|
|
printf("%s len %x >= datalen %x\n",
|
|
slp->sl_xname,
|
|
len, slp->sl_scp.scp_datalen);
|
|
}
|
|
}
|
|
else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
|
|
{
|
|
if (sc->sc_cnt != cnt)
|
|
{
|
|
slp->sl_error |= PDMAERR;
|
|
printf("%s: data read count error %x != %x\n",
|
|
slp->sl_xname, sc->sc_cnt, cnt);
|
|
}
|
|
}
|
|
sc->sc_cnt = cnt;
|
|
}
|
|
else
|
|
{
|
|
|
|
printf("%s data phase miss\n", slp->sl_xname);
|
|
slp->sl_error |= PDMAERR;
|
|
}
|
|
}
|
|
|
|
#define RFIFO_CRIT 64
|
|
#define WFIFO_CRIT 64
|
|
|
|
static void
|
|
nsp_pio_read(sc, ti)
|
|
struct nsp_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
int tout = sc->sc_wc;
|
|
u_int res, ocount, mask = sc->sc_mask;
|
|
u_int8_t stat, fstat;
|
|
|
|
slp->sl_flags |= HW_PDMASTART;
|
|
ocount = sc->sc_cnt;
|
|
|
|
while (slp->sl_scp.scp_datalen > 0 && tout -- > 0)
|
|
{
|
|
stat = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
|
stat &= SCBUSMON_PHMASK;
|
|
res = nsp_fifo_count(sc) - ocount;
|
|
if (res == 0)
|
|
{
|
|
if (stat == PHASE_DATAIN)
|
|
continue;
|
|
break;
|
|
}
|
|
|
|
fstat = bus_space_read_1(bst, bsh, nsp_fifosr);
|
|
if ((fstat & FIFOSR_FULLEMP) == 0 && stat == PHASE_DATAIN)
|
|
continue;
|
|
|
|
if (res > slp->sl_scp.scp_datalen)
|
|
break;
|
|
|
|
if (res >= NSP_BUFFER_SIZE)
|
|
res = NSP_BUFFER_SIZE;
|
|
else
|
|
res &= ~mask;
|
|
|
|
if (sc->sc_xfermr & XFERMR_MEM32)
|
|
{
|
|
bus_space_read_region_4(sc->sc_memt,
|
|
sc->sc_memh,
|
|
0,
|
|
(u_int32_t *) slp->sl_scp.scp_data,
|
|
res >> 2);
|
|
}
|
|
else
|
|
{
|
|
if (mask != 0)
|
|
bus_space_read_multi_4(bst, bsh, nsp_fifodr,
|
|
(u_int32_t *) slp->sl_scp.scp_data,
|
|
res >> 2);
|
|
else
|
|
bus_space_read_multi_1(bst, bsh, nsp_fifodr,
|
|
(u_int8_t *) slp->sl_scp.scp_data,
|
|
res);
|
|
}
|
|
|
|
slp->sl_scp.scp_data += res;
|
|
slp->sl_scp.scp_datalen -= res;
|
|
ocount += res;
|
|
}
|
|
|
|
sc->sc_cnt = ocount;
|
|
if (tout <= 0)
|
|
printf("%s pio read timeout\n", slp->sl_xname);
|
|
}
|
|
|
|
static void
|
|
nsp_pio_write(sc, ti)
|
|
struct nsp_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
u_int res, ocount, mask = sc->sc_mask;
|
|
int tout = sc->sc_wc;
|
|
register u_int8_t stat;
|
|
|
|
ocount = sc->sc_cnt;
|
|
slp->sl_flags |= HW_PDMASTART;
|
|
while (slp->sl_scp.scp_datalen > 0 && tout -- > 0)
|
|
{
|
|
stat = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
|
stat &= SCBUSMON_PHMASK;
|
|
if (stat != PHASE_DATAOUT)
|
|
break;
|
|
|
|
res = ocount - nsp_fifo_count(sc);
|
|
if (res > 0)
|
|
continue;
|
|
|
|
res = (slp->sl_scp.scp_datalen > WFIFO_CRIT) ? WFIFO_CRIT :
|
|
slp->sl_scp.scp_datalen;
|
|
|
|
if (sc->sc_xfermr & XFERMR_MEM32)
|
|
{
|
|
bus_space_write_region_4(sc->sc_memt,
|
|
sc->sc_memh,
|
|
0,
|
|
(u_int32_t *) slp->sl_scp.scp_data,
|
|
res >> 2);
|
|
}
|
|
else
|
|
{
|
|
if (mask != 0)
|
|
bus_space_write_multi_4(bst, bsh, nsp_fifodr,
|
|
(u_int32_t *) slp->sl_scp.scp_data, res >> 2);
|
|
else
|
|
bus_space_write_multi_1(bst, bsh, nsp_fifodr,
|
|
(u_int8_t *) slp->sl_scp.scp_data, res);
|
|
}
|
|
|
|
slp->sl_scp.scp_datalen -= res;
|
|
slp->sl_scp.scp_data += res;
|
|
ocount += res;
|
|
}
|
|
|
|
sc->sc_cnt = ocount;
|
|
if (tout <= 0)
|
|
printf("%s pio write timeout\n", slp->sl_xname);
|
|
}
|
|
|
|
static int
|
|
nsp_negate_signal(sc, mask, s)
|
|
struct nsp_softc *sc;
|
|
u_int8_t mask;
|
|
u_char *s;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
int wc = (sc->sc_wc >> 2);
|
|
u_int8_t regv;
|
|
|
|
do
|
|
{
|
|
regv = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
|
if (regv == 0xff)
|
|
break;
|
|
}
|
|
while ((regv & mask) != 0 && (-- wc) > 0);
|
|
|
|
if (wc <= 0)
|
|
printf("%s: %s singla off timeout \n", slp->sl_xname, s);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
nsp_xfer(sc, buf, len, phase)
|
|
struct nsp_softc *sc;
|
|
u_int8_t *buf;
|
|
int len;
|
|
int phase;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
int ptr, rv, atn;
|
|
|
|
atn = (scsi_low_is_msgout_continue(slp->sl_nexus) != 0);
|
|
for (ptr = 0; len > 0; len --, ptr ++)
|
|
{
|
|
rv = nsp_expect_signal(sc, phase, SCBUSMON_REQ);
|
|
if (rv <= 0)
|
|
goto out;
|
|
|
|
if (len == 1 && atn == 0)
|
|
{
|
|
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
|
|
SCBUSCR_ADIR | SCBUSCR_ACKEN);
|
|
}
|
|
|
|
if (phase & SCBUSMON_IO)
|
|
{
|
|
buf[ptr] = nsp_cr_read_1(bst, bsh, NSPR_DATAACK);
|
|
}
|
|
else
|
|
{
|
|
nsp_cr_write_1(bst, bsh, NSPR_DATAACK, buf[ptr]);
|
|
}
|
|
nsp_negate_signal(sc, SCBUSMON_ACK, "xfer<ACK>");
|
|
}
|
|
|
|
out:
|
|
return len;
|
|
}
|
|
|
|
static int
|
|
nsp_dataphase_bypass(sc, ti)
|
|
struct nsp_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
struct slccb *cb = ti->ti_nexus;
|
|
u_int cnt;
|
|
|
|
if (slp->sl_scp.scp_direction != SCSI_LOW_READ ||
|
|
(slp->sl_scp.scp_datalen % DEV_BSIZE) == 0)
|
|
return 0;
|
|
|
|
cnt = nsp_fifo_count(sc);
|
|
if (sc->sc_cnt == cnt)
|
|
return 0;
|
|
if (cnt >= DEV_BSIZE)
|
|
return EINVAL;
|
|
|
|
if (cb == NULL)
|
|
return 0;
|
|
|
|
/*
|
|
* XXX: NSP_QUIRK
|
|
* Data phase skip only occures in case of SCSI_LOW_READ.
|
|
*/
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
|
|
nsp_pio_read(sc, ti);
|
|
nsp_pdma_end(sc, ti);
|
|
#ifdef NSP_STATICS
|
|
nsp_statics[ti->ti_id].data_phase_bypass ++;
|
|
#endif /* NSP_STATICS */
|
|
return 0;
|
|
}
|
|
|
|
/**************************************************************
|
|
* disconnect & reselect (HW low)
|
|
**************************************************************/
|
|
static int
|
|
nsp_reselected(sc)
|
|
struct nsp_softc *sc;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
struct targ_info *ti;
|
|
u_int sid;
|
|
u_int8_t cr;
|
|
|
|
sid = (u_int) nsp_cr_read_1(bst, bsh, NSPR_RESELR);
|
|
sid &= ~sc->sc_idbit;
|
|
sid = ffs(sid) - 1;
|
|
if ((ti = scsi_low_reselected(slp, sid)) == NULL)
|
|
return EJUSTRETURN;
|
|
|
|
nsp_negate_signal(sc, SCBUSMON_SEL, "reselect<SEL>");
|
|
|
|
cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR) & ~(SCBUSCR_BSY | SCBUSCR_ATN);
|
|
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
|
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr | SCBUSCR_ADIR | SCBUSCR_ACKEN);
|
|
|
|
#ifdef NSP_STATICS
|
|
nsp_statics[sid].reselect ++;
|
|
#endif /* NSP_STATCIS */
|
|
return EJUSTRETURN;
|
|
}
|
|
|
|
static __inline int
|
|
nsp_disconnected(sc, ti)
|
|
struct nsp_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
|
|
#ifdef NSP_STATICS
|
|
if (slp->sl_msgphase == MSGPH_DISC)
|
|
nsp_statics[ti->ti_id].disconnect ++;
|
|
#endif /* NSP_STATICS */
|
|
|
|
scsi_low_disconnected(slp, ti);
|
|
return 1;
|
|
}
|
|
|
|
/**************************************************************
|
|
* SEQUENCER
|
|
**************************************************************/
|
|
static void nspmsg __P((struct nsp_softc *, u_char *, u_int8_t, u_int8_t, u_int8_t));
|
|
|
|
static void
|
|
nspmsg(sc, s, isrc, ph, irqphs)
|
|
struct nsp_softc *sc;
|
|
u_char *s;
|
|
u_int8_t isrc, ph, irqphs;
|
|
{
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
|
|
printf("%s: %s\n", slp->sl_xname, s);
|
|
printf("%s: isrc 0x%x scmon 0x%x irqphs 0x%x\n",
|
|
slp->sl_xname, (u_int) isrc, (u_int) ph, (u_int) irqphs);
|
|
}
|
|
|
|
static int
|
|
nsp_nexus(sc, ti)
|
|
struct nsp_softc *sc;
|
|
struct targ_info *ti;
|
|
{
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
struct nsp_targ_info *nti = (void *) ti;
|
|
|
|
/* setup synch transfer registers */
|
|
nsp_cr_write_1(bst, bsh, NSPR_SYNCR, nti->nti_reg_syncr);
|
|
nsp_cr_write_1(bst, bsh, NSPR_ACKWIDTH, nti->nti_reg_ackwidth);
|
|
|
|
/* setup pdma fifo */
|
|
nsp_setup_fifo(sc, 1);
|
|
|
|
/* clear ack counter */
|
|
sc->sc_cnt = 0;
|
|
nsp_cr_write_1(bst, bsh, NSPR_PTCLRR, PTCLRR_PT | PTCLRR_ACK |
|
|
PTCLRR_REQ | PTCLRR_HOST);
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
nspintr(arg)
|
|
void *arg;
|
|
{
|
|
struct nsp_softc *sc = arg;
|
|
struct scsi_low_softc *slp = &sc->sc_sclow;
|
|
bus_space_tag_t bst = sc->sc_iot;
|
|
bus_space_handle_t bsh = sc->sc_ioh;
|
|
struct targ_info *ti;
|
|
struct physio_proc *pp;
|
|
struct buf *bp;
|
|
int len, rv;
|
|
u_int8_t isrc, ph, irqphs, cr, regv;
|
|
|
|
/*******************************************
|
|
* interrupt check
|
|
*******************************************/
|
|
if (slp->sl_flags & HW_INACTIVE)
|
|
return 0;
|
|
|
|
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_IRQDIS);
|
|
isrc = bus_space_read_1(bst, bsh, nsp_irqsr);
|
|
if (isrc == 0xff || (isrc & IRQSR_MASK) == 0)
|
|
{
|
|
bus_space_write_1(bst, bsh, nsp_irqcr, 0);
|
|
return 0;
|
|
}
|
|
|
|
/* XXX: IMPORTANT
|
|
* Do not read an irqphs register if no scsi phase interrupt.
|
|
* Unless, you should lose a scsi phase interrupt.
|
|
*/
|
|
ph = nsp_cr_read_1(bst, bsh, NSPR_SCBUSMON);
|
|
if ((isrc & IRQSR_SCSI) != 0)
|
|
{
|
|
irqphs = nsp_cr_read_1(bst, bsh, NSPR_IRQPHS);
|
|
}
|
|
else
|
|
irqphs = 0;
|
|
|
|
/*
|
|
* timer interrupt handler (scsi vs timer interrupts)
|
|
*/
|
|
if (sc->sc_timer != 0)
|
|
{
|
|
nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
|
|
nsp_cr_write_1(bst, bsh, NSPR_TIMERCNT, 0);
|
|
sc->sc_timer = 0;
|
|
}
|
|
|
|
if ((isrc & IRQSR_MASK) == IRQSR_TIMER && sc->sc_seltout == 0)
|
|
{
|
|
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_TIMERCL);
|
|
return 1;
|
|
}
|
|
|
|
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_TIMERCL | IRQCR_FIFOCL);
|
|
|
|
/*******************************************
|
|
* debug section
|
|
*******************************************/
|
|
#ifdef NSP_DEBUG
|
|
if (nsp_debug)
|
|
{
|
|
nspmsg(sc, "current status", isrc, ph, irqphs);
|
|
scsi_low_print(slp, NULL);
|
|
if (nsp_debug > 1)
|
|
Debugger();
|
|
}
|
|
#endif /* NSP_DEBUG */
|
|
|
|
/*******************************************
|
|
* Parse hardware SCSI irq reasons register
|
|
*******************************************/
|
|
if ((isrc & IRQSR_SCSI) != 0)
|
|
{
|
|
if ((irqphs & IRQPHS_RST) != 0)
|
|
{
|
|
scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
|
|
"bus reset (power off?)");
|
|
return 1;
|
|
}
|
|
|
|
if ((irqphs & IRQPHS_RSEL) != 0)
|
|
{
|
|
bus_space_write_1(bst, bsh, nsp_irqcr, IRQCR_RESCL);
|
|
if (nsp_reselected(sc) == EJUSTRETURN)
|
|
return 1;
|
|
}
|
|
|
|
if ((irqphs & (IRQPHS_PCHG | IRQPHS_LBF)) == 0)
|
|
return 1;
|
|
}
|
|
|
|
/*******************************************
|
|
* nexus check
|
|
*******************************************/
|
|
if ((ti = slp->sl_nexus) == NULL)
|
|
{
|
|
/* unknown scsi phase changes */
|
|
nspmsg(sc, "unknown scsi phase changes", isrc, ph, irqphs);
|
|
return 0;
|
|
}
|
|
|
|
/*******************************************
|
|
* aribitration & selection
|
|
*******************************************/
|
|
switch (ti->ti_phase)
|
|
{
|
|
case PH_SELSTART:
|
|
if ((ph & SCBUSMON_BSY) == 0)
|
|
{
|
|
if (sc->sc_seltout >= NSP_SELTIMEOUT)
|
|
{
|
|
sc->sc_seltout = 0;
|
|
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, 0);
|
|
return nsp_disconnected(sc, ti);
|
|
}
|
|
sc->sc_seltout ++;
|
|
nsp_start_timer(sc, 1000 / 51);
|
|
return 1;
|
|
}
|
|
|
|
/* attention assert */
|
|
sc->sc_seltout = 0;
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
|
|
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, sc->sc_busc);
|
|
delay(1);
|
|
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR,
|
|
sc->sc_busc | SCBUSCR_ADIR | SCBUSCR_ACKEN);
|
|
|
|
SCSI_LOW_TARGET_ASSERT_ATN(ti);
|
|
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_IDENTIFY, 0);
|
|
return 1;
|
|
|
|
case PH_RESEL:
|
|
if ((ph & SCBUSMON_PHMASK) != PHASE_MSGIN)
|
|
{
|
|
scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
|
|
return 1;
|
|
}
|
|
/* fall */
|
|
|
|
default:
|
|
if ((isrc & (IRQSR_SCSI | IRQSR_FIFO)) == 0)
|
|
return 1;
|
|
break;
|
|
}
|
|
|
|
/*******************************************
|
|
* scsi seq
|
|
*******************************************/
|
|
if (slp->sl_flags & HW_PDMASTART)
|
|
nsp_pdma_end(sc, ti);
|
|
|
|
/* normal disconnect */
|
|
if (slp->sl_msgphase != 0 && (irqphs & IRQPHS_LBF) != 0)
|
|
return nsp_disconnected(sc, ti);
|
|
|
|
/* check unexpected bus free state */
|
|
if (ph == 0)
|
|
{
|
|
nspmsg(sc, "unexpected bus free", isrc, ph, irqphs);
|
|
return nsp_disconnected(sc, ti);
|
|
}
|
|
|
|
/* check normal scsi phase */
|
|
switch (ph & SCBUSMON_PHMASK)
|
|
{
|
|
case PHASE_CMD:
|
|
if ((ph & SCBUSMON_REQ) == 0)
|
|
return 1;
|
|
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
|
|
if (scsi_low_cmd(slp, ti) != 0)
|
|
break;
|
|
|
|
nsp_cr_write_1(bst, bsh, NSPR_CMDCR, CMDCR_PTCLR);
|
|
for (len = 0; len < slp->sl_scp.scp_cmdlen; len ++)
|
|
nsp_cr_write_1(bst, bsh, NSPR_CMDDR,
|
|
slp->sl_scp.scp_cmd[len]);
|
|
|
|
nsp_cr_write_1(bst, bsh, NSPR_CMDCR, CMDCR_PTCLR | CMDCR_EXEC);
|
|
break;
|
|
|
|
case PHASE_DATAOUT:
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
|
|
if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
|
|
break;
|
|
|
|
pp = physio_proc_enter(bp);
|
|
nsp_pio_write(sc, ti);
|
|
physio_proc_leave(pp);
|
|
break;
|
|
|
|
case PHASE_DATAIN:
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
|
|
if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
|
|
break;
|
|
|
|
pp = physio_proc_enter(bp);
|
|
nsp_pio_read(sc, ti);
|
|
physio_proc_leave(pp);
|
|
break;
|
|
|
|
case PHASE_STATUS:
|
|
nsp_dataphase_bypass(sc, ti);
|
|
if ((ph & SCBUSMON_REQ) == 0)
|
|
return 1;
|
|
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
|
|
ti->ti_status = nsp_cr_read_1(bst, bsh, NSPR_DATAACK);
|
|
break;
|
|
|
|
case PHASE_MSGOUT:
|
|
if ((ph & SCBUSMON_REQ) == 0)
|
|
goto timerout;
|
|
|
|
/*
|
|
* XXX: NSP QUIRK
|
|
* NSP invoke interrupts only in the case of scsi phase changes,
|
|
* therefore we should poll the scsi phase here to catch
|
|
* the next "msg out" if exists (no scsi phase changes).
|
|
*/
|
|
rv = len = 16;
|
|
do {
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
|
|
|
|
len = scsi_low_msgout(slp, ti);
|
|
if (nsp_xfer(sc, ti->ti_msgoutstr, len, PHASE_MSGOUT))
|
|
{
|
|
scsi_low_assert_msg(slp, ti,
|
|
SCSI_LOW_MSG_RESET, 0);
|
|
nspmsg(sc, "MSGOUT: xfer short",
|
|
isrc, ph, irqphs);
|
|
}
|
|
|
|
/* catch a next signal */
|
|
rv = nsp_expect_signal(sc, PHASE_MSGOUT, SCBUSMON_REQ);
|
|
}
|
|
while (rv > 0 && len -- > 0);
|
|
break;
|
|
|
|
case PHASE_MSGIN:
|
|
nsp_dataphase_bypass(sc, ti);
|
|
if ((ph & SCBUSMON_REQ) == 0)
|
|
goto timerout;
|
|
|
|
SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
|
|
|
|
/*
|
|
* XXX: NSP QUIRK
|
|
* NSP invoke interrupts only in the case of scsi phase changes,
|
|
* therefore we should poll the scsi phase here to catch
|
|
* the next "msg in" if exists (no scsi phase changes).
|
|
*/
|
|
rv = len = 16;
|
|
do {
|
|
/* read a data */
|
|
regv = nsp_cr_read_1(bst, bsh, NSPR_DATA);
|
|
|
|
/* assert ack */
|
|
cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR);
|
|
cr |= SCBUSCR_ACK;
|
|
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
|
nsp_negate_signal(sc, SCBUSMON_REQ, "msgin<REQ>");
|
|
|
|
scsi_low_msgin(slp, ti, regv);
|
|
|
|
/* deassert ack */
|
|
cr = nsp_cr_read_1(bst, bsh, NSPR_SCBUSCR);
|
|
cr &= ~SCBUSCR_ACK;
|
|
nsp_cr_write_1(bst, bsh, NSPR_SCBUSCR, cr);
|
|
|
|
/* catch a next signal */
|
|
rv = nsp_expect_signal(sc, PHASE_MSGIN, SCBUSMON_REQ);
|
|
}
|
|
while (rv > 0 && len -- > 0);
|
|
break;
|
|
|
|
case PHASE_SEL:
|
|
default:
|
|
nspmsg(sc, "unknown scsi phase", isrc, ph, irqphs);
|
|
break;
|
|
}
|
|
|
|
return 1;
|
|
|
|
timerout:
|
|
nsp_start_timer(sc, 1000 / 102);
|
|
return 0;
|
|
}
|