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667 lines
16 KiB
C
667 lines
16 KiB
C
/*-
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* Copyright (c) 1998, 1999 Nicolas Souchu
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*
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*/
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/*
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* Power Management support for the Acer M15x3 chipsets
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/uio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus_memio.h>
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#include <machine/bus.h>
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#include <pci/pcivar.h>
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#include <pci/pcireg.h>
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#include <dev/iicbus/iiconf.h>
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#include <dev/smbus/smbconf.h>
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#include "smbus_if.h"
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#include "alpm.h"
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#ifndef COMPAT_OLDPCI
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#error "The alpm device requires the old pci compatibility shims"
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#endif
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#define ALPM_DEBUG(x) if (alpm_debug) (x)
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#ifdef DEBUG
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static int alpm_debug = 1;
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#else
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static int alpm_debug = 0;
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#endif
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#define ACER_M1543_PMU_ID 0x710110b9
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/* Uncomment this line to force another I/O base address for SMB */
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/* #define ALPM_SMBIO_BASE_ADDR 0x3a80 */
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/* I/O registers offsets - the base address is programmed via the
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* SMBBA PCI configuration register
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*/
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#define SMBSTS 0x0 /* SMBus host/slave status register */
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#define SMBCMD 0x1 /* SMBus host/slave command register */
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#define SMBSTART 0x2 /* start to generate programmed cycle */
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#define SMBHADDR 0x3 /* host address register */
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#define SMBHDATA 0x4 /* data A register for host controller */
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#define SMBHDATB 0x5 /* data B register for host controller */
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#define SMBHBLOCK 0x6 /* block register for host controller */
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#define SMBHCMD 0x7 /* command register for host controller */
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/* SMBSTS masks */
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#define TERMINATE 0x80
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#define BUS_COLLI 0x40
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#define DEVICE_ERR 0x20
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#define SMI_I_STS 0x10
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#define HST_BSY 0x08
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#define IDL_STS 0x04
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#define HSTSLV_STS 0x02
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#define HSTSLV_BSY 0x01
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/* SMBCMD masks */
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#define SMB_BLK_CLR 0x80
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#define T_OUT_CMD 0x08
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#define ABORT_HOST 0x04
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/* SMBus commands */
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#define SMBQUICK 0x00
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#define SMBSRBYTE 0x10 /* send/receive byte */
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#define SMBWRBYTE 0x20 /* write/read byte */
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#define SMBWRWORD 0x30 /* write/read word */
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#define SMBWRBLOCK 0x40 /* write/read block */
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/* PCI configuration registers and masks
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*/
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#define COM 0x4
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#define COM_ENABLE_IO 0x1
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#define SMBBA 0x14
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#define ATPC 0x5b
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#define ATPC_SMBCTRL 0x04
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#define SMBHSI 0xe0
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#define SMBHSI_SLAVE 0x2
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#define SMBHSI_HOST 0x1
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#define SMBHCBC 0xe2
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#define SMBHCBC_CLOCK 0x70
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#define SMBCLOCK_149K 0x0
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#define SMBCLOCK_74K 0x20
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#define SMBCLOCK_37K 0x40
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#define SMBCLOCK_223K 0x80
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#define SMBCLOCK_111K 0xa0
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#define SMBCLOCK_55K 0xc0
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struct alpm_data {
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int base;
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bus_space_tag_t smbst;
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bus_space_handle_t smbsh;
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pcici_t tag;
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};
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struct alpm_data alpmdata[NALPM];
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struct alsmb_softc {
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int base;
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device_t smbus;
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struct alpm_data *alpm;
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};
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#define ALPM_SMBINB(alsmb,register) \
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(bus_space_read_1(alsmb->alpm->smbst, alsmb->alpm->smbsh, register))
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#define ALPM_SMBOUTB(alsmb,register,value) \
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(bus_space_write_1(alsmb->alpm->smbst, alsmb->alpm->smbsh, register, value))
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static int alsmb_probe(device_t);
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static int alsmb_attach(device_t);
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static int alsmb_smb_callback(device_t, int, caddr_t *);
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static int alsmb_smb_quick(device_t dev, u_char slave, int how);
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static int alsmb_smb_sendb(device_t dev, u_char slave, char byte);
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static int alsmb_smb_recvb(device_t dev, u_char slave, char *byte);
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static int alsmb_smb_writeb(device_t dev, u_char slave, char cmd, char byte);
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static int alsmb_smb_readb(device_t dev, u_char slave, char cmd, char *byte);
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static int alsmb_smb_writew(device_t dev, u_char slave, char cmd, short word);
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static int alsmb_smb_readw(device_t dev, u_char slave, char cmd, short *word);
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static int alsmb_smb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf);
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static int alsmb_smb_bread(device_t dev, u_char slave, char cmd, u_char count, char *byte);
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static devclass_t alsmb_devclass;
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static device_method_t alsmb_methods[] = {
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/* device interface */
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DEVMETHOD(device_probe, alsmb_probe),
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DEVMETHOD(device_attach, alsmb_attach),
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/* bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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/* smbus interface */
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DEVMETHOD(smbus_callback, alsmb_smb_callback),
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DEVMETHOD(smbus_quick, alsmb_smb_quick),
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DEVMETHOD(smbus_sendb, alsmb_smb_sendb),
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DEVMETHOD(smbus_recvb, alsmb_smb_recvb),
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DEVMETHOD(smbus_writeb, alsmb_smb_writeb),
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DEVMETHOD(smbus_readb, alsmb_smb_readb),
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DEVMETHOD(smbus_writew, alsmb_smb_writew),
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DEVMETHOD(smbus_readw, alsmb_smb_readw),
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DEVMETHOD(smbus_bwrite, alsmb_smb_bwrite),
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DEVMETHOD(smbus_bread, alsmb_smb_bread),
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{ 0, 0 }
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};
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static driver_t alsmb_driver = {
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"alsmb",
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alsmb_methods,
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sizeof(struct alsmb_softc),
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};
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static const char* alpm_pci_probe(pcici_t tag, pcidi_t type);
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static void alpm_pci_attach(pcici_t tag, int unit);
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static u_long alpm_count;
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static struct pci_device alpm_device = {
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"alpm",
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alpm_pci_probe,
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alpm_pci_attach,
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&alpm_count
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};
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COMPAT_PCI_DRIVER (alpm, alpm_device);
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static const char*
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alpm_pci_probe(pcici_t tag, pcidi_t type)
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{
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if (type == ACER_M1543_PMU_ID)
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return ("AcerLabs M15x3 Power Management Unit");
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return ((char *)0);
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}
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static void
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alpm_pci_attach(pcici_t tag, int unit)
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{
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struct alpm_data *alpm;
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u_long l;
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if (unit >= NALPM) {
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printf("alpm%d: attach: only %d units configured.\n",
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unit, NALPM);
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return;
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}
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alpm = &alpmdata[unit];
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alpm->tag = tag;
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/* Unlock SMBIO base register access */
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l = pci_cfgread(tag, ATPC, 1);
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pci_cfgwrite(tag, ATPC, l & ~ATPC_SMBCTRL, 1);
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if (bootverbose) {
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l = pci_cfgread(tag, SMBHSI, 1);
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printf("alsmb%d: %s/%s", unit,
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(l & SMBHSI_HOST) ? "host":"nohost",
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(l & SMBHSI_SLAVE) ? "slave":"noslave");
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l = pci_cfgread(tag, SMBHCBC, 1);
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switch (l & SMBHCBC_CLOCK) {
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case SMBCLOCK_149K:
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printf(" 149K");
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break;
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case SMBCLOCK_74K:
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printf(" 74K");
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break;
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case SMBCLOCK_37K:
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printf(" 37K");
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break;
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case SMBCLOCK_223K:
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printf(" 223K");
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break;
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case SMBCLOCK_111K:
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printf(" 111K");
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break;
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case SMBCLOCK_55K:
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printf(" 55K");
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break;
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}
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}
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alpm->smbst = I386_BUS_SPACE_IO;
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#ifdef ALPM_SMBIO_BASE_ADDR
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/* disable I/O */
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l = pci_cfgread(tag, COM, 2);
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pci_cfgwrite(tag, COM, l & ~COM_ENABLE_IO, 2);
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/* set the I/O base address */
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pci_cfgwrite(tag, SMBBA, ALPM_SMBIO_BASE_ADDR | 0x1, 4);
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/* enable I/O */
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pci_cfgwrite(tag, COM, l | COM_ENABLE_IO, 2);
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alpm->smbsh = ALPM_SMBIO_BASE_ADDR;
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#else
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alpm->smbsh = pci_cfgread(tag, SMBBA, 4) & ~0x1;
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#endif
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if (bootverbose)
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printf(" at 0x%x\n", alpm->smbsh);
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/* XXX add the I2C interface to the root_bus until pcibus is ready */
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device_add_child(root_bus, "alsmb", unit);
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return;
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}
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/*
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* Not a real probe, we know the device exists since the device has
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* been added after the successfull pci probe.
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*/
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static int
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alsmb_probe(device_t dev)
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{
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struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
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sc->alpm = &alpmdata[device_get_unit(dev)];
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device_set_desc(dev, "Aladdin IV/V/Pro2 SMBus controller");
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return (0);
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}
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static int
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alsmb_attach(device_t dev)
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{
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struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
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/* allocate a new smbus device */
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sc->smbus = smbus_alloc_bus(dev);
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/* probe and attach the smbus */
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device_probe_and_attach(sc->smbus);
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return (0);
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}
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static int
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alsmb_smb_callback(device_t dev, int index, caddr_t *data)
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{
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int error = 0;
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switch (index) {
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case SMB_REQUEST_BUS:
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case SMB_RELEASE_BUS:
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/* ok, bus allocation accepted */
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break;
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default:
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error = EINVAL;
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}
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return (error);
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}
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static int
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alsmb_clear(struct alsmb_softc *sc)
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{
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ALPM_SMBOUTB(sc, SMBSTS, 0xff);
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DELAY(10);
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return (0);
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}
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#if 0
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static int
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alsmb_abort(struct alsmb_softc *sc)
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{
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ALPM_SMBOUTB(sc, SMBCMD, T_OUT_CMD | ABORT_HOST);
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return (0);
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}
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#endif
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static int
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alsmb_idle(struct alsmb_softc *sc)
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{
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u_char sts;
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sts = ALPM_SMBINB(sc, SMBSTS);
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ALPM_DEBUG(printf("alpm: idle? STS=0x%x\n", sts));
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return (sts & IDL_STS);
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}
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/*
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* Poll the SMBus controller
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*/
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static int
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alsmb_wait(struct alsmb_softc *sc)
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{
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int count = 10000;
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u_char sts;
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int error;
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/* wait for command to complete and SMBus controller is idle */
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while(count--) {
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DELAY(10);
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sts = ALPM_SMBINB(sc, SMBSTS);
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if (sts & SMI_I_STS)
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break;
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}
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ALPM_DEBUG(printf("alpm: STS=0x%x\n", sts));
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error = SMB_ENOERR;
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if (!count)
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error |= SMB_ETIMEOUT;
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if (sts & TERMINATE)
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error |= SMB_EABORT;
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if (sts & BUS_COLLI)
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error |= SMB_ENOACK;
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if (sts & DEVICE_ERR)
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error |= SMB_EBUSERR;
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if (error != SMB_ENOERR)
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alsmb_clear(sc);
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return (error);
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}
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static int
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alsmb_smb_quick(device_t dev, u_char slave, int how)
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{
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struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
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int error;
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alsmb_clear(sc);
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if (!alsmb_idle(sc))
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return (EBUSY);
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switch (how) {
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case SMB_QWRITE:
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ALPM_DEBUG(printf("alpm: QWRITE to 0x%x", slave));
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ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
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break;
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case SMB_QREAD:
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ALPM_DEBUG(printf("alpm: QREAD to 0x%x", slave));
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ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
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break;
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default:
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panic("%s: unknown QUICK command (%x)!", __FUNCTION__,
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how);
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}
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ALPM_SMBOUTB(sc, SMBCMD, SMBQUICK);
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ALPM_SMBOUTB(sc, SMBSTART, 0xff);
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error = alsmb_wait(sc);
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ALPM_DEBUG(printf(", error=0x%x\n", error));
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return (error);
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}
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static int
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alsmb_smb_sendb(device_t dev, u_char slave, char byte)
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{
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struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
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int error;
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alsmb_clear(sc);
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if (!alsmb_idle(sc))
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return (SMB_EBUSY);
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ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
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ALPM_SMBOUTB(sc, SMBCMD, SMBSRBYTE);
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ALPM_SMBOUTB(sc, SMBHDATA, byte);
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ALPM_SMBOUTB(sc, SMBSTART, 0xff);
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error = alsmb_wait(sc);
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ALPM_DEBUG(printf("alpm: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
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return (error);
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}
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static int
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alsmb_smb_recvb(device_t dev, u_char slave, char *byte)
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{
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struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
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int error;
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alsmb_clear(sc);
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if (!alsmb_idle(sc))
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return (SMB_EBUSY);
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ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
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ALPM_SMBOUTB(sc, SMBCMD, SMBSRBYTE);
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ALPM_SMBOUTB(sc, SMBSTART, 0xff);
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if ((error = alsmb_wait(sc)) == SMB_ENOERR)
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*byte = ALPM_SMBINB(sc, SMBHDATA);
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ALPM_DEBUG(printf("alpm: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
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return (error);
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}
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static int
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alsmb_smb_writeb(device_t dev, u_char slave, char cmd, char byte)
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{
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struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
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int error;
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alsmb_clear(sc);
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if (!alsmb_idle(sc))
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return (SMB_EBUSY);
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ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
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ALPM_SMBOUTB(sc, SMBCMD, SMBWRBYTE);
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ALPM_SMBOUTB(sc, SMBHDATA, byte);
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ALPM_SMBOUTB(sc, SMBHCMD, cmd);
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ALPM_SMBOUTB(sc, SMBSTART, 0xff);
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error = alsmb_wait(sc);
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ALPM_DEBUG(printf("alpm: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
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return (error);
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}
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static int
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alsmb_smb_readb(device_t dev, u_char slave, char cmd, char *byte)
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{
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struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
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int error;
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alsmb_clear(sc);
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if (!alsmb_idle(sc))
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return (SMB_EBUSY);
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ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
|
|
ALPM_SMBOUTB(sc, SMBCMD, SMBWRBYTE);
|
|
ALPM_SMBOUTB(sc, SMBHCMD, cmd);
|
|
ALPM_SMBOUTB(sc, SMBSTART, 0xff);
|
|
|
|
if ((error = alsmb_wait(sc)) == SMB_ENOERR)
|
|
*byte = ALPM_SMBINB(sc, SMBHDATA);
|
|
|
|
ALPM_DEBUG(printf("alpm: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, *byte, error));
|
|
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
alsmb_smb_writew(device_t dev, u_char slave, char cmd, short word)
|
|
{
|
|
struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
|
|
int error;
|
|
|
|
alsmb_clear(sc);
|
|
if (!alsmb_idle(sc))
|
|
return (SMB_EBUSY);
|
|
|
|
ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
|
|
ALPM_SMBOUTB(sc, SMBCMD, SMBWRWORD);
|
|
ALPM_SMBOUTB(sc, SMBHDATA, word & 0x00ff);
|
|
ALPM_SMBOUTB(sc, SMBHDATB, (word & 0xff00) >> 8);
|
|
ALPM_SMBOUTB(sc, SMBHCMD, cmd);
|
|
ALPM_SMBOUTB(sc, SMBSTART, 0xff);
|
|
|
|
error = alsmb_wait(sc);
|
|
|
|
ALPM_DEBUG(printf("alpm: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
|
|
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
alsmb_smb_readw(device_t dev, u_char slave, char cmd, short *word)
|
|
{
|
|
struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
|
|
int error;
|
|
u_char high, low;
|
|
|
|
alsmb_clear(sc);
|
|
if (!alsmb_idle(sc))
|
|
return (SMB_EBUSY);
|
|
|
|
ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
|
|
ALPM_SMBOUTB(sc, SMBCMD, SMBWRWORD);
|
|
ALPM_SMBOUTB(sc, SMBHCMD, cmd);
|
|
ALPM_SMBOUTB(sc, SMBSTART, 0xff);
|
|
|
|
if ((error = alsmb_wait(sc)) == SMB_ENOERR) {
|
|
low = ALPM_SMBINB(sc, SMBHDATA);
|
|
high = ALPM_SMBINB(sc, SMBHDATB);
|
|
|
|
*word = ((high & 0xff) << 8) | (low & 0xff);
|
|
}
|
|
|
|
ALPM_DEBUG(printf("alpm: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, *word, error));
|
|
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
alsmb_smb_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
|
|
{
|
|
struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
|
|
u_char remain, len, i;
|
|
int error = SMB_ENOERR;
|
|
|
|
alsmb_clear(sc);
|
|
if(!alsmb_idle(sc))
|
|
return (SMB_EBUSY);
|
|
|
|
remain = count;
|
|
while (remain) {
|
|
len = min(remain, 32);
|
|
|
|
ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
|
|
|
|
/* set the cmd and reset the
|
|
* 32-byte long internal buffer */
|
|
ALPM_SMBOUTB(sc, SMBCMD, SMBWRBLOCK | SMB_BLK_CLR);
|
|
|
|
ALPM_SMBOUTB(sc, SMBHDATA, len);
|
|
|
|
/* fill the 32-byte internal buffer */
|
|
for (i=0; i<len; i++) {
|
|
ALPM_SMBOUTB(sc, SMBHBLOCK, buf[count-remain+i]);
|
|
DELAY(2);
|
|
}
|
|
ALPM_SMBOUTB(sc, SMBHCMD, cmd);
|
|
ALPM_SMBOUTB(sc, SMBSTART, 0xff);
|
|
|
|
if ((error = alsmb_wait(sc)) != SMB_ENOERR)
|
|
goto error;
|
|
|
|
remain -= len;
|
|
}
|
|
|
|
error:
|
|
ALPM_DEBUG(printf("alpm: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
|
|
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
alsmb_smb_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
|
|
{
|
|
struct alsmb_softc *sc = (struct alsmb_softc *)device_get_softc(dev);
|
|
u_char remain, len, i;
|
|
int error = SMB_ENOERR;
|
|
|
|
alsmb_clear(sc);
|
|
if (!alsmb_idle(sc))
|
|
return (SMB_EBUSY);
|
|
|
|
remain = count;
|
|
while (remain) {
|
|
ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
|
|
|
|
/* set the cmd and reset the
|
|
* 32-byte long internal buffer */
|
|
ALPM_SMBOUTB(sc, SMBCMD, SMBWRBLOCK | SMB_BLK_CLR);
|
|
|
|
ALPM_SMBOUTB(sc, SMBHCMD, cmd);
|
|
ALPM_SMBOUTB(sc, SMBSTART, 0xff);
|
|
|
|
if ((error = alsmb_wait(sc)) != SMB_ENOERR)
|
|
goto error;
|
|
|
|
len = ALPM_SMBINB(sc, SMBHDATA);
|
|
|
|
/* read the 32-byte internal buffer */
|
|
for (i=0; i<len; i++) {
|
|
buf[count-remain+i] = ALPM_SMBINB(sc, SMBHBLOCK);
|
|
DELAY(2);
|
|
}
|
|
|
|
remain -= len;
|
|
}
|
|
error:
|
|
ALPM_DEBUG(printf("alpm: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
|
|
|
|
return (error);
|
|
}
|
|
|
|
DRIVER_MODULE(alsmb, root, alsmb_driver, alsmb_devclass, 0, 0);
|