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50e24eb628
the cpu dependent files. It will need to be done differently for USIII. - Simplify the logic for detecting context rollovers. Instead of dealing with it when the next context switch would cause the context numbers to rollover, deal with it when they actually do rollover. - Move some things around in cpu_switch so that we only do 1 membar #Sync when switching address space, instead of 2. - Detect kernel threads by comparing the new vm space to vmspace0, instead if checking if the tlb context is 0. - Removed some debug code.
146 lines
4.4 KiB
C
146 lines
4.4 KiB
C
/*-
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* Copyright (c) 2001 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include "opt_pmap.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/ktr.h>
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#include <sys/linker_set.h>
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#include <sys/pcpu.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/smp.h>
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#include <sys/sysctl.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/pmap.h>
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#include <machine/smp.h>
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#include <machine/tlb.h>
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PMAP_STATS_VAR(tlb_ncontext_demap);
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PMAP_STATS_VAR(tlb_npage_demap);
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PMAP_STATS_VAR(tlb_nrange_demap);
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tlb_flush_user_t *tlb_flush_user;
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/*
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* Some tlb operations must be atomic, so no interrupt or trap can be allowed
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* while they are in progress. Traps should not happen, but interrupts need to
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* be explicitely disabled. critical_enter() cannot be used here, since it only
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* disables soft interrupts.
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*/
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void
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tlb_context_demap(struct pmap *pm)
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{
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void *cookie;
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u_long s;
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/*
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* It is important that we are not interrupted or preempted while
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* doing the IPIs. The interrupted CPU may hold locks, and since
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* it will wait for the CPU that sent the IPI, this can lead
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* to a deadlock when an interrupt comes in on that CPU and it's
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* handler tries to grab one of that locks. This will only happen for
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* spin locks, but these IPI types are delivered even if normal
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* interrupts are disabled, so the lock critical section will not
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* protect the target processor from entering the IPI handler with
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* the lock held.
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*/
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PMAP_STATS_INC(tlb_ncontext_demap);
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cookie = ipi_tlb_context_demap(pm);
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if (pm->pm_active & PCPU_GET(cpumask)) {
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KASSERT(pm->pm_context[PCPU_GET(cpuid)] != -1,
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("tlb_context_demap: inactive pmap?"));
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s = intr_disable();
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stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_DMMU_DEMAP, 0);
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stxa(TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, ASI_IMMU_DEMAP, 0);
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membar(Sync);
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intr_restore(s);
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}
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ipi_wait(cookie);
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}
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void
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tlb_page_demap(struct pmap *pm, vm_offset_t va)
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{
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u_long flags;
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void *cookie;
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u_long s;
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PMAP_STATS_INC(tlb_npage_demap);
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cookie = ipi_tlb_page_demap(pm, va);
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if (pm->pm_active & PCPU_GET(cpumask)) {
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KASSERT(pm->pm_context[PCPU_GET(cpuid)] != -1,
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("tlb_page_demap: inactive pmap?"));
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if (pm == kernel_pmap)
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flags = TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE;
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else
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flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE;
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s = intr_disable();
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stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0);
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stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0);
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membar(Sync);
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intr_restore(s);
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}
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ipi_wait(cookie);
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}
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void
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tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end)
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{
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vm_offset_t va;
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void *cookie;
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u_long flags;
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u_long s;
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PMAP_STATS_INC(tlb_nrange_demap);
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cookie = ipi_tlb_range_demap(pm, start, end);
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if (pm->pm_active & PCPU_GET(cpumask)) {
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KASSERT(pm->pm_context[PCPU_GET(cpuid)] != -1,
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("tlb_range_demap: inactive pmap?"));
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if (pm == kernel_pmap)
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flags = TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE;
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else
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flags = TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE;
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s = intr_disable();
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for (va = start; va < end; va += PAGE_SIZE) {
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stxa(TLB_DEMAP_VA(va) | flags, ASI_DMMU_DEMAP, 0);
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stxa(TLB_DEMAP_VA(va) | flags, ASI_IMMU_DEMAP, 0);
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membar(Sync);
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}
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intr_restore(s);
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}
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ipi_wait(cookie);
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}
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