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134c58d3c0
the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1 PHY comes up with the isolate bit in the control register set by default, but it also has the autonegotiate bit set. When you tell the xmphy driver to select IFM_AUTO mode, it sees that the autoneg bit is already on, and thus doesn't bother updating the control register. However this means that the isolate bit is never turned off (unless you manually select 1000baseSX full or half duplex mode, which does result in the control register being modified and the ISO bit being turned off). This subtle and unusual behavioral difference stopped me from being able to receive packets on the SMC9462TX card for several days, since isolating the PHY disconnects it from the MAC's data interface. The fix is to omit the 'is the autoneg big set?' test, since it doesn't really provide much of an optimization anyway. This commit also updates the xmphy driver to support the Jato/Level 1 internal PHY. (I'm not sure how Jato Technologies is related to Level 1: all I know is the OUI from the PHY ID registers maps to Jato in the OUI database.) This will be used once I add the if_lge driver to support the LXT10010 chip.
156 lines
5.9 KiB
Plaintext
156 lines
5.9 KiB
Plaintext
$FreeBSD$
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/*$NetBSD: miidevs,v 1.6 1999/05/14 11:37:30 drochner Exp $*/
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* List of known MII OUIs.
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* For a complete list see http://standards.ieee.org/regauth/oui/
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*
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* XXX Vendors do obviously not agree how OUIs (18 bit) are mapped
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* to the 16 bits available in the id registers. The MII_OUI() macro
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* in "mii.h" reflects the most obvious way. If a vendor uses a
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* different mapping, an "xx" prefixed OUI is defined here which is
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* mangled accordingly to compensate.
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*/
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oui ALTIMA 0x0010a9 Altima Communications
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oui AMD 0x00001a Advanced Micro Devices
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oui BROADCOM 0x001018 Broadcom Corporation
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oui DAVICOM 0x00606e Davicom Semiconductor
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oui ICS 0x00a0be Integrated Circuit Systems
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oui INTEL 0x00aa00 Intel
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oui JATO 0x00e083 Jato Technologies
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oui LEVEL1 0x00207b Level 1
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oui NATSEMI 0x080017 National Semiconductor
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oui QUALSEMI 0x006051 Quality Semiconductor
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oui SEEQ 0x00a07d Seeq
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oui SIS 0x00e006 Silicon Integrated Systems
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oui TDK 0x00c039 TDK
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oui TI 0x080028 Texas Instruments
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oui XAQTI 0x00e0ae XaQti Corp.
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oui MARVELL 0x005043 Marvell Semiconductor
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/* in the 79c873, AMD uses another OUI (which matches Davicom!) */
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oui xxAMD 0x00606e Advanced Micro Devices
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/* Intel 82553 A/B steppings */
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oui xxINTEL 0x00f800 Intel
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/* some vendors have the bits swapped within bytes
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(ie, ordered as on the wire) */
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oui xxALTIMA 0x000895 Altima Communications
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oui xxBROADCOM 0x000818 Broadcom Corporation
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oui xxICS 0x00057d Integrated Circuit Systems
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oui xxSEEQ 0x0005be Seeq
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oui xxSIS 0x000760 Silicon Integrated Systems
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oui xxTI 0x100014 Texas Instruments
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oui xxXAQTI 0x350700 XaQti Corp.
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/* Level 1 is completely different - from right to left.
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(Two bits get lost in the third OUI byte.) */
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oui xxLEVEL1 0x1e0400 Level 1
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/* Don't know what's going on here. */
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oui xxDAVICOM 0x006040 Davicom Semiconductor
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/*
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* List of known models. Grouped by oui.
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*/
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/* Altima Communications PHYs */
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model xxALTIMA AC101 0x0021 AC101 10/100 media interface
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/* Advanced Micro Devices PHYs */
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model xxAMD 79C873 0x0000 Am79C873 10/100 media interface
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model AMD 79c973phy 0x0036 Am79c973 internal PHY
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model AMD 79c978 0x0039 Am79c978 HomePNA PHY
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/* Broadcom Corp. PHYs. */
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model BROADCOM 3c905Cphy 0x0017 3c905C 10/100 internal PHY
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model xxBROADCOM BCM5400 0x0004 Broadcom 1000baseTX PHY
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/* Davicom Semiconductor PHYs */
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model xxDAVICOM DM9101 0x0000 DM9101 10/100 media interface
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/* Integrated Circuit Systems PHYs */
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model xxICS 1890 0x0002 ICS1890 10/100 media interface
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/* Intel PHYs */
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model xxINTEL I82553AB 0x0000 i83553 10/100 media interface
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model INTEL I82555 0x0015 i82555 10/100 media interface
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model INTEL I82562EM 0x0032 i82562EM 10/100 media interface
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model INTEL I82562ET 0x0033 i82562ET 10/100 media interface
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model INTEL I82553C 0x0035 i82553 10/100 media interface
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/* Jato Technologies PHYs */
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model JATO BASEX 0x0000 Jato 1000baseX media interface
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/* Level 1 PHYs */
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model xxLEVEL1 LXT970 0x0000 LXT970 10/100 media interface
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/* National Semiconductor PHYs */
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model NATSEMI DP83840 0x0000 DP83840 10/100 media interface
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model NATSEMI DP83843 0x0001 DP83843 10/100 media interface
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model NATSEMI DP83891 0x0005 DP83891 10/100/1000 media interface
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model NATSEMI DP83861 0x0006 DP83861 10/100/1000 media interface
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/* Quality Semiconductor PHYs */
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model QUALSEMI QS6612 0x0000 QS6612 10/100 media interface
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/* Seeq PHYs */
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model xxSEEQ 80220 0x0003 Seeq 80220 10/100 media interface
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model xxSEEQ 84220 0x0004 Seeq 84220 10/100 media interface
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/* Silicon Integrated Systems PHYs */
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model xxSIS 900 0x0000 SiS 900 10/100 media interface
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/* TDK */
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model TDK 78Q2120 0x0014 TDK 78Q2120 media interface
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/* Texas Instruments PHYs */
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model xxTI TLAN10T 0x0001 ThunderLAN 10baseT media interface
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model xxTI 100VGPMI 0x0002 ThunderLAN 100VG-AnyLan media interface
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/* XaQti Corp. PHYs. */
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model XAQTI XMACII 0x0000 XaQti Corp. XMAC II gigabit interface
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/* Marvell Semiconductor PHYs */
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model MARVELL E1000 0x0000 Marvell Semiconductor 88E1000* gigabit PHY
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