Marcel Moolenaar 23fbc06bfc Support lbc interrupts: ... o Save and clear the LTESR register in the interrupt handler. o In lbc_read_reg(), return the saved LTESR register value if applicable (i.e. when the saved value is not invalid (read: ~0U)). o In lbc_write_reg(), clear the bits in the saved register when when it's written to and when the asved value is not invalid. o Also in lbc_write_reg(), the LTESR register is unlocked (in H/W) when bit 1 of LTEATR is cleared. We use this to invalidate our saved LTESR register value. Subsequent reads and write go to H/W directly. While here: o In lbc_read_reg() & lbc_write_reg(), add some belts and suspenders to catch when register offsets are out of range. o In lbc_attach(), initialize completely and don't leave something left for lbc_banks_enable().		2012-07-03 00:06:14 +00:00
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atpic.c	Fix r222813: we need to include sys/cpuset.h. because the PIC interface	2011-07-31 18:30:38 +00:00
ds1553_bus_fdt.c
ds1553_core.c
ds1553_reg.h
fsl_sdhc.c	Import eSDHC driver for Freescale integrated controller.	2012-05-26 21:07:15 +00:00
fsl_sdhc.h	Import eSDHC driver for Freescale integrated controller.	2012-05-26 21:07:15 +00:00
i2c.c	Remove Semihakf-ism. DEBUG is a kernel configuration option. It	2012-05-24 21:09:38 +00:00
isa.c
lbc.c	Support lbc interrupts:	2012-07-03 00:06:14 +00:00
lbc.h	Support lbc interrupts:	2012-07-03 00:06:14 +00:00
mpc85xx.c	Just return if the size of the window is 0. This can happen when the	2012-05-24 21:07:10 +00:00
mpc85xx.h	Remove unused defines. They're distracting...	2011-05-28 16:30:24 +00:00
nexus.c	Properly implement the bus_config_intr, bus_setup_intr and bus_teardown_intr	2012-07-02 23:41:56 +00:00
pci_fdt.c	Either the I/O port range or the memory mapped I/O range may not be	2012-05-24 21:01:35 +00:00