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61ddb5c9d7
with newbus.
201 lines
7.4 KiB
C
201 lines
7.4 KiB
C
/* $NetBSD: midwayvar.h,v 1.10 1997/03/20 21:34:46 chuck Exp $ */
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/*
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*
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* Copyright (c) 1996 Charles D. Cranor and Washington University.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles D. Cranor and
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* Washington University.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* m i d w a y v a r . h
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*
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* we define the en_softc here so that bus specific modules can allocate
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* it as the first item in their softc. note that BSD-required
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* "struct device" is in the mid_softc!
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*
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* author: Chuck Cranor <chuck@ccrc.wustl.edu>
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*/
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/*
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* params needed to determine softc size
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*/
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#ifndef EN_NTX
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#define EN_NTX 8 /* number of tx bufs to use */
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#endif
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#ifndef EN_TXSZ
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#define EN_TXSZ 32 /* trasmit buf size in KB */
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#endif
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#ifndef EN_RXSZ
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#define EN_RXSZ 32 /* recv buf size in KB */
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#endif
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#define EN_MAXNRX ((2048-(EN_NTX*EN_TXSZ))/EN_RXSZ)
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/* largest possible NRX (depends on RAM size) */
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#if defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__)
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#define EN_INTR_TYPE int
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#define EN_INTR_RET(X) return(X)
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#if defined(__NetBSD__) || defined(__OpenBSD__)
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#define EN_IOCTL_CMDT u_long
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#elif defined(__bsdi__)
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#define EN_IOCTL_CMDT int
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#endif
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#elif defined(__FreeBSD__)
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#define EN_INTR_TYPE void
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#define EN_INTR_RET(X) return
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#define EN_IOCTL_CMDT u_long
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struct midway_device {
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char dv_xname[IFNAMSIZ];
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};
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#define DV_IFNET 1
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#endif
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/*
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* softc
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*/
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struct en_softc {
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/* bsd glue */
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struct midway_device sc_dev; /* system device */
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struct ifnet enif; /* network ifnet handle */
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/* bus glue */
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bus_space_tag_t en_memt; /* for EN_READ/EN_WRITE */
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bus_space_handle_t en_base; /* base of en card */
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bus_size_t en_obmemsz; /* size of en card (bytes) */
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void (*en_busreset)(void *);
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/* bus specific reset function */
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/* serv list */
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u_int32_t hwslistp; /* hw pointer to service list (byte offset) */
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u_int16_t swslist[MID_SL_N]; /* software service list (see en_service()) */
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u_int16_t swsl_head, /* ends of swslist (index into swslist) */
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swsl_tail;
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u_int32_t swsl_size; /* # of items in swsl */
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/* xmit dma */
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u_int32_t dtq[MID_DTQ_N]; /* sw copy of dma q (see ENIDQ macros) */
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u_int32_t dtq_free; /* # of dtq's free */
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u_int32_t dtq_us; /* software copy of our pointer (byte offset) */
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u_int32_t dtq_chip; /* chip's pointer (byte offset) */
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u_int32_t need_dtqs; /* true if we ran out of DTQs */
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/* recv dma */
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u_int32_t drq[MID_DRQ_N]; /* sw copy of dma q (see ENIDQ macros) */
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u_int32_t drq_free; /* # of drq's free */
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u_int32_t drq_us; /* software copy of our pointer (byte offset) */
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u_int32_t drq_chip; /* chip's pointer (byte offset) */
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u_int32_t need_drqs; /* true if we ran out of DRQs */
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/* xmit buf ctrl. (per channel) */
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struct {
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u_int32_t mbsize; /* # mbuf bytes we are using (max=TXHIWAT) */
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u_int32_t bfree; /* # free bytes in buffer (not dma or xmit) */
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u_int32_t start, stop; /* ends of buffer area (byte offset) */
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u_int32_t cur; /* next free area (byte offset) */
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u_int32_t nref; /* # of VCs using this channel */
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struct ifqueue indma; /* mbufs being dma'd now */
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struct ifqueue q; /* mbufs waiting for dma now */
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} txslot[MID_NTX_CH];
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/* xmit vc ctrl. (per vc) */
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u_int8_t txspeed[MID_N_VC]; /* speed of tx on a VC */
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u_int8_t txvc2slot[MID_N_VC]; /* map VC to slot */
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/* recv vc ctrl. (per vc). maps VC number to recv slot */
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u_int16_t rxvc2slot[MID_N_VC];
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int en_nrx; /* # of active rx slots */
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/* recv buf ctrl. (per recv slot) */
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struct {
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void *rxhand; /* recv. handle if doing direct delivery */
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u_int32_t mode; /* saved copy of mode info */
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u_int32_t start, stop; /* ends of my buffer area */
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u_int32_t cur; /* where I am at */
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u_int16_t atm_vci; /* backpointer to VCI */
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u_int8_t atm_flags; /* copy of atm_flags from atm_ph */
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u_int8_t oth_flags; /* other flags */
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u_int32_t raw_threshold; /* for raw mode */
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struct ifqueue indma; /* mbufs being dma'd now */
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struct ifqueue q; /* mbufs waiting for dma now */
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} rxslot[EN_MAXNRX]; /* recv info */
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u_int8_t macaddr[6]; /* card unique mac address */
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/* stats */
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u_int32_t vtrash; /* sw copy of counter */
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u_int32_t otrash; /* sw copy of counter */
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u_int32_t ttrash; /* # of RBD's with T bit set */
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u_int32_t mfix; /* # of times we had to call mfix */
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u_int32_t mfixfail; /* # of times mfix failed */
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u_int32_t headbyte; /* # of times we used BYTE DMA at front */
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u_int32_t tailbyte; /* # of times we used BYTE DMA at end */
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u_int32_t tailflush; /* # of times we had to FLUSH out DMA bytes */
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u_int32_t txmbovr; /* # of times we dropped due to mbsize */
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u_int32_t dmaovr; /* tx dma overflow count */
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u_int32_t txoutspace; /* out of space in xmit buffer */
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u_int32_t txdtqout; /* out of DTQs */
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u_int32_t launch; /* total # of launches */
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u_int32_t lheader; /* # of launches without OB header */
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u_int32_t ltail; /* # of launches without OB tail */
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u_int32_t hwpull; /* # of pulls off hardware service list */
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u_int32_t swadd; /* # of pushes on sw service list */
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u_int32_t rxqnotus; /* # of times we pull from rx q, but fail */
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u_int32_t rxqus; /* # of good pulls from rx q */
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u_int32_t rxoutboth; /* # of times out of mbufs and DRQs */
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u_int32_t rxdrqout; /* # of times out of DRQs */
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u_int32_t rxmbufout; /* # of time out of mbufs */
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/* random stuff */
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u_int32_t ipl; /* sbus interrupt lvl (1 on pci?) */
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u_int8_t bestburstcode; /* code of best burst we can use */
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u_int8_t bestburstlen; /* length of best burst (bytes) */
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u_int8_t bestburstshift; /* (x >> shift) == (x / bestburstlen) */
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u_int8_t bestburstmask; /* bits to check if not multiple of burst */
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u_int8_t alburst; /* align dma bursts? */
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u_int8_t is_adaptec; /* adaptec version of midway? */
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};
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/*
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* exported functions
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*/
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void en_attach(struct en_softc *);
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EN_INTR_TYPE en_intr(void *);
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void en_reset(struct en_softc *);
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