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4af7c8949e
MFC after: 1 week
433 lines
12 KiB
C
433 lines
12 KiB
C
/*
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* Copyright (C) 2010 Andreas Tobler
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/lock.h>
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#include <sys/msgbuf.h>
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#include <sys/mutex.h>
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#include <sys/proc.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#include <sys/vmmeter.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/ofw_machdep.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_page.h>
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#include <vm/vm_map.h>
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#include <vm/vm_object.h>
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#include <vm/vm_extern.h>
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#include <vm/vm_pageout.h>
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#include <vm/uma.h>
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#include <powerpc/aim/mmu_oea64.h>
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#include "mmu_if.h"
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#include "moea64_if.h"
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#include "phyp-hvcall.h"
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extern int n_slbs;
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/*
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* Kernel MMU interface
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*/
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static void mphyp_bootstrap(mmu_t mmup, vm_offset_t kernelstart,
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vm_offset_t kernelend);
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static void mphyp_cpu_bootstrap(mmu_t mmup, int ap);
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static void mphyp_pte_synch(mmu_t, uintptr_t pt, struct lpte *pvo_pt);
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static void mphyp_pte_clear(mmu_t, uintptr_t pt, struct lpte *pvo_pt,
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uint64_t vpn, u_int64_t ptebit);
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static void mphyp_pte_unset(mmu_t, uintptr_t pt, struct lpte *pvo_pt,
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uint64_t vpn);
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static void mphyp_pte_change(mmu_t, uintptr_t pt, struct lpte *pvo_pt,
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uint64_t vpn);
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static int mphyp_pte_insert(mmu_t, u_int ptegidx, struct lpte *pvo_pt);
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static uintptr_t mphyp_pvo_to_pte(mmu_t, const struct pvo_entry *pvo);
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#define VSID_HASH_MASK 0x0000007fffffffffULL
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static mmu_method_t mphyp_methods[] = {
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MMUMETHOD(mmu_bootstrap, mphyp_bootstrap),
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MMUMETHOD(mmu_cpu_bootstrap, mphyp_cpu_bootstrap),
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MMUMETHOD(moea64_pte_synch, mphyp_pte_synch),
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MMUMETHOD(moea64_pte_clear, mphyp_pte_clear),
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MMUMETHOD(moea64_pte_unset, mphyp_pte_unset),
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MMUMETHOD(moea64_pte_change, mphyp_pte_change),
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MMUMETHOD(moea64_pte_insert, mphyp_pte_insert),
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MMUMETHOD(moea64_pvo_to_pte, mphyp_pvo_to_pte),
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{ 0, 0 }
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};
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MMU_DEF_INHERIT(pseries_mmu, "mmu_phyp", mphyp_methods, 0, oea64_mmu);
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static void
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mphyp_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend)
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{
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uint64_t final_pteg_count = 0;
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char buf[8];
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uint32_t prop[2];
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uint32_t nptlp, shift = 0, slb_encoding = 0;
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phandle_t dev, node, root;
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int idx, len, res;
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moea64_early_bootstrap(mmup, kernelstart, kernelend);
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root = OF_peer(0);
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dev = OF_child(root);
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while (dev != 0) {
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res = OF_getprop(dev, "name", buf, sizeof(buf));
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if (res > 0 && strcmp(buf, "cpus") == 0)
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break;
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dev = OF_peer(dev);
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}
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node = OF_child(dev);
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while (node != 0) {
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res = OF_getprop(node, "device_type", buf, sizeof(buf));
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if (res > 0 && strcmp(buf, "cpu") == 0)
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break;
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node = OF_peer(node);
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}
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res = OF_getprop(node, "ibm,pft-size", prop, sizeof(prop));
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if (res <= 0)
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panic("mmu_phyp: unknown PFT size");
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final_pteg_count = 1 << prop[1];
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res = OF_getprop(node, "ibm,slb-size", prop, sizeof(prop[0]));
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if (res > 0)
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n_slbs = prop[0];
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moea64_pteg_count = final_pteg_count / sizeof(struct lpteg);
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/*
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* Scan the large page size property for PAPR compatible machines.
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* See PAPR D.5 Changes to Section 5.1.4, 'CPU Node Properties'
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* for the encoding of the property.
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*/
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len = OF_getproplen(node, "ibm,segment-page-sizes");
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if (len > 0) {
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/*
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* We have to use a variable length array on the stack
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* since we have very limited stack space.
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*/
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cell_t arr[len/sizeof(cell_t)];
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res = OF_getprop(node, "ibm,segment-page-sizes", &arr,
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sizeof(arr));
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len /= 4;
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idx = 0;
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while (len > 0) {
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shift = arr[idx];
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slb_encoding = arr[idx + 1];
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nptlp = arr[idx + 2];
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idx += 3;
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len -= 3;
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while (len > 0 && nptlp) {
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idx += 2;
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len -= 2;
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nptlp--;
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}
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}
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/* For now we allow shift only to be <= 0x18. */
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if (shift >= 0x18)
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shift = 0x18;
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moea64_large_page_shift = shift;
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moea64_large_page_size = 1ULL << shift;
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}
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moea64_mid_bootstrap(mmup, kernelstart, kernelend);
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moea64_late_bootstrap(mmup, kernelstart, kernelend);
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}
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static void
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mphyp_cpu_bootstrap(mmu_t mmup, int ap)
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{
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struct slb *slb = PCPU_GET(slb);
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register_t seg0;
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int i;
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/*
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* Install kernel SLB entries
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*/
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__asm __volatile ("slbia");
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__asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0));
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for (i = 0; i < 64; i++) {
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if (!(slb[i].slbe & SLBE_VALID))
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continue;
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__asm __volatile ("slbmte %0, %1" ::
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"r"(slb[i].slbv), "r"(slb[i].slbe));
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}
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}
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static void
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mphyp_pte_synch(mmu_t mmu, uintptr_t slot, struct lpte *pvo_pt)
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{
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struct lpte pte;
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uint64_t junk;
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__asm __volatile("ptesync");
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phyp_pft_hcall(H_READ, 0, slot, 0, 0, &pte.pte_hi, &pte.pte_lo,
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&junk);
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pvo_pt->pte_lo |= pte.pte_lo & (LPTE_CHG | LPTE_REF);
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}
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static void
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mphyp_pte_clear(mmu_t mmu, uintptr_t slot, struct lpte *pvo_pt, uint64_t vpn,
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u_int64_t ptebit)
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{
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if (ptebit & LPTE_CHG)
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phyp_hcall(H_CLEAR_MOD, 0, slot);
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if (ptebit & LPTE_REF)
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phyp_hcall(H_CLEAR_REF, 0, slot);
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}
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static void
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mphyp_pte_unset(mmu_t mmu, uintptr_t slot, struct lpte *pvo_pt, uint64_t vpn)
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{
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struct lpte pte;
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uint64_t junk;
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int err;
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err = phyp_pft_hcall(H_REMOVE, 1UL << 31, slot,
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pvo_pt->pte_hi & LPTE_AVPN_MASK, 0, &pte.pte_hi, &pte.pte_lo,
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&junk);
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KASSERT(err == H_SUCCESS, ("Error removing page: %d", err));
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pvo_pt->pte_lo |= pte.pte_lo & (LPTE_CHG | LPTE_REF);
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}
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static void
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mphyp_pte_change(mmu_t mmu, uintptr_t slot, struct lpte *pvo_pt, uint64_t vpn)
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{
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struct lpte evicted;
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uint64_t index, junk;
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int64_t result;
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/*
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* NB: this is protected by the global table lock, so this two-step
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* is safe, except for the scratch-page case. No CPUs on which we run
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* this code should be using scratch pages.
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*/
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KASSERT(!(pvo_pt->pte_hi & LPTE_LOCKED),
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("Locked pages not supported on PHYP"));
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/* XXX: optimization using H_PROTECT for common case? */
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mphyp_pte_unset(mmu, slot, pvo_pt, vpn);
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result = phyp_pft_hcall(H_ENTER, H_EXACT, slot, pvo_pt->pte_hi,
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pvo_pt->pte_lo, &index, &evicted.pte_lo, &junk);
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if (result != H_SUCCESS)
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panic("mphyp_pte_change() insertion failure: %ld\n", result);
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}
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static __inline int
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mphyp_pte_spillable_ident(u_int ptegidx, struct lpte *to_evict)
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{
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uint64_t slot, junk, k;
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struct lpte pt;
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int i, j;
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/* Start at a random slot */
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i = mftb() % 8;
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k = -1;
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for (j = 0; j < 8; j++) {
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slot = (ptegidx << 3) + (i + j) % 8;
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phyp_pft_hcall(H_READ, 0, slot, 0, 0, &pt.pte_hi, &pt.pte_lo,
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&junk);
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if (pt.pte_hi & LPTE_SWBITS)
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continue;
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/* This is a candidate, so remember it */
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k = slot;
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/* Try to get a page that has not been used lately */
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if (!(pt.pte_lo & LPTE_REF)) {
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memcpy(to_evict, &pt, sizeof(struct lpte));
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return (k);
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}
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}
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phyp_pft_hcall(H_READ, 0, slot, 0, 0, &to_evict->pte_hi,
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&to_evict->pte_lo, &junk);
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return (k);
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}
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static int
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mphyp_pte_insert(mmu_t mmu, u_int ptegidx, struct lpte *pvo_pt)
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{
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int64_t result;
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struct lpte evicted;
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struct pvo_entry *pvo;
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uint64_t index, junk;
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u_int pteg_bktidx;
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/* Check for locked pages, which we can't support on this system */
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KASSERT(!(pvo_pt->pte_hi & LPTE_LOCKED),
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("Locked pages not supported on PHYP"));
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/* Initialize PTE */
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pvo_pt->pte_hi |= LPTE_VALID;
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pvo_pt->pte_hi &= ~LPTE_HID;
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evicted.pte_hi = 0;
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/*
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* First try primary hash.
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*/
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pteg_bktidx = ptegidx;
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result = phyp_pft_hcall(H_ENTER, 0, pteg_bktidx << 3, pvo_pt->pte_hi,
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pvo_pt->pte_lo, &index, &evicted.pte_lo, &junk);
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if (result == H_SUCCESS)
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return (index & 0x07);
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KASSERT(result == H_PTEG_FULL, ("Page insertion error: %ld "
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"(ptegidx: %#x/%#x, PTE %#lx/%#lx", result, ptegidx,
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moea64_pteg_count, pvo_pt->pte_hi, pvo_pt->pte_lo));
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/*
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* Next try secondary hash.
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*/
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pteg_bktidx ^= moea64_pteg_mask;
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pvo_pt->pte_hi |= LPTE_HID;
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result = phyp_pft_hcall(H_ENTER, 0, pteg_bktidx << 3,
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pvo_pt->pte_hi, pvo_pt->pte_lo, &index, &evicted.pte_lo, &junk);
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if (result == H_SUCCESS)
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return (index & 0x07);
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KASSERT(result == H_PTEG_FULL, ("Secondary page insertion error: %ld",
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result));
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/*
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* Out of luck. Find a PTE to sacrifice.
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*/
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pteg_bktidx = ptegidx;
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index = mphyp_pte_spillable_ident(pteg_bktidx, &evicted);
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if (index == -1L) {
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pteg_bktidx ^= moea64_pteg_mask;
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index = mphyp_pte_spillable_ident(pteg_bktidx, &evicted);
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}
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if (index == -1L) {
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/* No freeable slots in either PTEG? We're hosed. */
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panic("mphyp_pte_insert: overflow");
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return (-1);
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}
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if (pteg_bktidx == ptegidx)
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pvo_pt->pte_hi &= ~LPTE_HID;
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else
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pvo_pt->pte_hi |= LPTE_HID;
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/*
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* Synchronize the sacrifice PTE with its PVO, then mark both
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* invalid. The PVO will be reused when/if the VM system comes
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* here after a fault.
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*/
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if (evicted.pte_hi & LPTE_HID)
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pteg_bktidx ^= moea64_pteg_mask; /* PTEs indexed by primary */
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LIST_FOREACH(pvo, &moea64_pvo_table[pteg_bktidx], pvo_olink) {
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if (pvo->pvo_pte.lpte.pte_hi == evicted.pte_hi) {
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KASSERT(pvo->pvo_pte.lpte.pte_hi & LPTE_VALID,
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("Invalid PVO for valid PTE!"));
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mphyp_pte_unset(mmu, index, &pvo->pvo_pte.lpte,
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pvo->pvo_vpn);
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PVO_PTEGIDX_CLR(pvo);
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moea64_pte_overflow++;
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break;
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}
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}
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KASSERT(pvo->pvo_pte.lpte.pte_hi == evicted.pte_hi,
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("Unable to find PVO for spilled PTE"));
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/*
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* Set the new PTE.
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*/
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result = phyp_pft_hcall(H_ENTER, H_EXACT, index, pvo_pt->pte_hi,
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pvo_pt->pte_lo, &index, &evicted.pte_lo, &junk);
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if (result == H_SUCCESS)
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return (index & 0x07);
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panic("Page replacement error: %ld", result);
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return (-1);
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}
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static __inline u_int
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va_to_pteg(uint64_t vsid, vm_offset_t addr, int large)
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{
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uint64_t hash;
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int shift;
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shift = large ? moea64_large_page_shift : ADDR_PIDX_SHFT;
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hash = (vsid & VSID_HASH_MASK) ^ (((uint64_t)addr & ADDR_PIDX) >>
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shift);
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return (hash & moea64_pteg_mask);
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}
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static uintptr_t
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mphyp_pvo_to_pte(mmu_t mmu, const struct pvo_entry *pvo)
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{
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uint64_t vsid;
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u_int ptegidx;
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/* If the PTEG index is not set, then there is no page table entry */
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if (!PVO_PTEGIDX_ISSET(pvo))
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return (-1);
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vsid = PVO_VSID(pvo);
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ptegidx = va_to_pteg(vsid, PVO_VADDR(pvo), pvo->pvo_vaddr & PVO_LARGE);
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/*
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* We can find the actual pte entry without searching by grabbing
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* the PTEG index from 3 unused bits in pvo_vaddr and by
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* noticing the HID bit.
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*/
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if (pvo->pvo_pte.lpte.pte_hi & LPTE_HID)
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ptegidx ^= moea64_pteg_mask;
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return ((ptegidx << 3) | PVO_PTEGIDX_GET(pvo));
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}
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