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f7710986e2
be loaded above 1MB. Same boot code for floppies now. Speed improvements. etc etc etc. (I don't have much history on this, but then have been tested)
293 lines
6.1 KiB
ArmAsm
293 lines
6.1 KiB
ArmAsm
/*
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* Ported to boot 386BSD by Julian Elischer (julian@tfs.com) Sept 1992
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*
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* Mach Operating System
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* Copyright (c) 1992, 1991 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*/
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/*
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* HISTORY
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* $Log: asm.S,v $
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Revision 1.2 1993/07/11 12:02:19 andrew
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Fixes from bde, including support for loading @ any MB boundary (e.g. a
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kernel linked for 0xfe100000 will load at the 1MB mark) and read-ahead
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buffering to speed booting from floppies. Also works with aha174x
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controllers in enhanced mode.
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*
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* 93/06/28 bde
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* Switch IDT for debugger.
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*
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* Change all addr16's to addr32's and all data16's to data32's.
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*
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* 93/06/26 bde
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* Avoid "pushw $xreal". Gas botches it even for 32-bit mode.
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*
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Revision 1.1 1993/03/21 18:08:21 cgd
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after 0.2.2 "stable" patches applied
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* Revision 2.2 92/04/04 11:34:13 rpd
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* Fix Intel Copyright as per B. Davies authorization.
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* [92/04/03 rvb]
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* From 2.5 boot: pruned inb(), outb(), and pzero().
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* [92/03/30 rvb]
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*
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* Revision 2.2 91/04/02 14:35:10 mbj
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* Added _sp() => where is the stack at. [kupfer]
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* Add Intel copyright
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* [90/02/09 rvb]
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*
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*/
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/*
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Copyright 1988, 1989, 1990, 1991, 1992
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by Intel Corporation, Santa Clara, California.
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All Rights Reserved
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Permission to use, copy, modify, and distribute this software and
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its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appears in all
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copies and that both the copyright notice and this permission notice
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appear in supporting documentation, and that the name of Intel
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not be used in advertising or publicity pertaining to distribution
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of the software without specific, written prior permission.
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INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
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IN NO EVENT SHALL INTEL BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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.file "asm.s"
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#include "asm.h"
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CR0_PE_ON = 0x1
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CR0_PE_OFF = 0xfffffffe
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.globl _ouraddr
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.text
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/*
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#
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# real_to_prot()
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# transfer from real mode to protected mode.
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*/
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ENTRY(real_to_prot)
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# guarantee that interrupt is disabled when in prot mode
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cli
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# load the gdtr
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addr32
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data32
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lgdt EXT(Gdtr)
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# set the PE bit of CR0
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mov %cr0, %eax
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data32
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or $CR0_PE_ON, %eax
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mov %eax, %cr0
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# make intrasegment jump to flush the processor pipeline and
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# reload CS register
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data32
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ljmp $0x18, $xprot
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xprot:
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# we are in USE32 mode now
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# set up the protected mode segment registers : DS, SS, ES
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mov $0x20, %eax
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movw %ax, %ds
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movw %ax, %ss
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movw %ax, %es
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# load idtr so we can debug
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lidt EXT(Idtr_prot)
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ret
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/*
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#
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# prot_to_real()
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# transfer from protected mode to real mode
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#
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*/
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ENTRY(prot_to_real)
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# set up a dummy stack frame for the second seg change.
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movl _ouraddr, %eax
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sarl $4, %eax
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pushw %ax
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movw $xreal, %ax # gas botches pushw $xreal - extra bytes 0, 0
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pushw %ax # decode to add %al, (%eax) (%al usually 0)
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# Change to use16 mode.
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ljmp $0x28, $x16
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x16:
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# clear the PE bit of CR0
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mov %cr0, %eax
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data32
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and $CR0_PE_OFF, %eax
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mov %eax, %cr0
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# make intersegment jmp to flush the processor pipeline
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# using the fake stack frame set up earlier
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# and reload CS register
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lret
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xreal:
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# we are in real mode now
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# set up the real mode segment registers : DS, SS, ES
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movw %cs, %ax
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movw %ax, %ds
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movw %ax, %ss
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movw %ax, %es
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# load idtr so we can debug
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addr32
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data32
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lidt EXT(Idtr_real)
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data32
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ret
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/*
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#
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# startprog(phyaddr)
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# start the program on protected mode where phyaddr is the entry point
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#
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*/
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ENTRY(startprog)
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push %ebp
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mov %esp, %ebp
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# get things we need into registers
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movl 0x8(%ebp), %ecx # entry offset
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movl 0x0c(%ebp), %eax # &argv
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# make a new stack at 0:0xa0000 (big segs)
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mov $0x10, %ebx
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movw %bx, %ss
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movl $0xa0000, %ebx
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movl %ebx, %esp
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# push some number of args onto the stack
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pushl $0 # nominally a cyl offset in the boot.
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pushl 0x8(%eax) # argv[2] = bootdev
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pushl 0x4(%eax) # argv[1] = howto
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pushl $0 # dummy 'return' address
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# push on our entry address
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mov $0x08, %ebx # segment
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pushl %ebx
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pushl %ecx
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# convert over the other data segs
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mov $0x10, %ebx
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movw %bx, %ds
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movw %bx, %es
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# convert the PC (and code seg)
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lret
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/*
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#
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# pbzero( dst, cnt)
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# where src is a virtual address and dst is a physical address
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*/
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ENTRY(pbzero)
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push %ebp
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mov %esp, %ebp
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push %es
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push %esi
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push %edi
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push %ecx
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cld
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# set %es to point at the flat segment
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mov $0x10, %eax
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movw %ax, %es
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mov 0x8(%ebp), %edi # destination
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mov 0xc(%ebp), %ecx # count
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mov $0x0, %eax # value
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rep
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stosb
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pop %ecx
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pop %edi
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pop %esi
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pop %es
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pop %ebp
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ret
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/*
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#
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# pcpy(src, dst, cnt)
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# where src is a virtual address and dst is a physical address
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#
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*/
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ENTRY(pcpy)
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push %ebp
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mov %esp, %ebp
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push %es
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push %esi
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push %edi
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push %ecx
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cld
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# set %es to point at the flat segment
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mov $0x10, %eax
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movw %ax, %es
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mov 0x8(%ebp), %esi # source
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mov 0xc(%ebp), %edi # destination
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mov 0x10(%ebp), %ecx # count
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rep
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movsb
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pop %ecx
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pop %edi
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pop %esi
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pop %es
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pop %ebp
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ret
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