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49fef6a202
Sponsored by: Nginx, Inc.
420 lines
9.9 KiB
C
420 lines
9.9 KiB
C
/*-
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* Copyright (c) 2001 Wind River Systems, Inc.
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* All rights reserved.
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* Written by: John Baldwin <jhb@FreeBSD.org>
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*
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* Copyright (c) 2009 Jeffrey Roberson <jeff@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* This module provides MI support for per-cpu data.
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*
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* Each architecture determines the mapping of logical CPU IDs to physical
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* CPUs. The requirements of this mapping are as follows:
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* - Logical CPU IDs must reside in the range 0 ... MAXCPU - 1.
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* - The mapping is not required to be dense. That is, there may be
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* gaps in the mappings.
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* - The platform sets the value of MAXCPU in <machine/param.h>.
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* - It is suggested, but not required, that in the non-SMP case, the
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* platform define MAXCPU to be 1 and define the logical ID of the
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* sole CPU as 0.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/lock.h>
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#include <sys/malloc.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/smp.h>
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#include <sys/sx.h>
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#include <vm/uma.h>
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#include <ddb/ddb.h>
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static MALLOC_DEFINE(M_PCPU, "Per-cpu", "Per-cpu resource accouting.");
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struct dpcpu_free {
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uintptr_t df_start;
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int df_len;
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TAILQ_ENTRY(dpcpu_free) df_link;
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};
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static DPCPU_DEFINE(char, modspace[DPCPU_MODMIN]);
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static TAILQ_HEAD(, dpcpu_free) dpcpu_head = TAILQ_HEAD_INITIALIZER(dpcpu_head);
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static struct sx dpcpu_lock;
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uintptr_t dpcpu_off[MAXCPU];
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struct pcpu *cpuid_to_pcpu[MAXCPU];
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struct cpuhead cpuhead = STAILQ_HEAD_INITIALIZER(cpuhead);
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/*
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* Initialize the MI portions of a struct pcpu.
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*/
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void
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pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
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{
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bzero(pcpu, size);
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KASSERT(cpuid >= 0 && cpuid < MAXCPU,
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("pcpu_init: invalid cpuid %d", cpuid));
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pcpu->pc_cpuid = cpuid;
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cpuid_to_pcpu[cpuid] = pcpu;
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STAILQ_INSERT_TAIL(&cpuhead, pcpu, pc_allcpu);
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cpu_pcpu_init(pcpu, cpuid, size);
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pcpu->pc_rm_queue.rmq_next = &pcpu->pc_rm_queue;
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pcpu->pc_rm_queue.rmq_prev = &pcpu->pc_rm_queue;
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}
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void
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dpcpu_init(void *dpcpu, int cpuid)
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{
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struct pcpu *pcpu;
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pcpu = pcpu_find(cpuid);
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pcpu->pc_dynamic = (uintptr_t)dpcpu - DPCPU_START;
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/*
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* Initialize defaults from our linker section.
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*/
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memcpy(dpcpu, (void *)DPCPU_START, DPCPU_BYTES);
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/*
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* Place it in the global pcpu offset array.
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*/
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dpcpu_off[cpuid] = pcpu->pc_dynamic;
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}
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static void
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dpcpu_startup(void *dummy __unused)
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{
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struct dpcpu_free *df;
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df = malloc(sizeof(*df), M_PCPU, M_WAITOK | M_ZERO);
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df->df_start = (uintptr_t)&DPCPU_NAME(modspace);
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df->df_len = DPCPU_MODMIN;
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TAILQ_INSERT_HEAD(&dpcpu_head, df, df_link);
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sx_init(&dpcpu_lock, "dpcpu alloc lock");
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}
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SYSINIT(dpcpu, SI_SUB_KLD, SI_ORDER_FIRST, dpcpu_startup, 0);
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/*
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* UMA_PCPU_ZONE zones, that are available for all kernel
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* consumers. Right now 64 bit zone is used for counter(9)
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* and pointer zone is used by flowtable.
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*/
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uma_zone_t pcpu_zone_64;
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uma_zone_t pcpu_zone_ptr;
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static void
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pcpu_zones_startup(void)
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{
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pcpu_zone_64 = uma_zcreate("64 pcpu", sizeof(uint64_t),
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NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_PCPU);
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if (sizeof(uint64_t) == sizeof(void *))
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pcpu_zone_ptr = pcpu_zone_64;
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else
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pcpu_zone_ptr = uma_zcreate("ptr pcpu", sizeof(void *),
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NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_PCPU);
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}
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SYSINIT(pcpu_zones, SI_SUB_KMEM, SI_ORDER_ANY, pcpu_zones_startup, NULL);
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/*
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* First-fit extent based allocator for allocating space in the per-cpu
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* region reserved for modules. This is only intended for use by the
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* kernel linkers to place module linker sets.
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*/
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void *
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dpcpu_alloc(int size)
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{
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struct dpcpu_free *df;
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void *s;
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s = NULL;
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size = roundup2(size, sizeof(void *));
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sx_xlock(&dpcpu_lock);
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TAILQ_FOREACH(df, &dpcpu_head, df_link) {
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if (df->df_len < size)
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continue;
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if (df->df_len == size) {
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s = (void *)df->df_start;
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TAILQ_REMOVE(&dpcpu_head, df, df_link);
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free(df, M_PCPU);
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break;
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}
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s = (void *)df->df_start;
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df->df_len -= size;
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df->df_start = df->df_start + size;
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break;
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}
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sx_xunlock(&dpcpu_lock);
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return (s);
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}
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/*
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* Free dynamic per-cpu space at module unload time.
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*/
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void
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dpcpu_free(void *s, int size)
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{
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struct dpcpu_free *df;
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struct dpcpu_free *dn;
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uintptr_t start;
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uintptr_t end;
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size = roundup2(size, sizeof(void *));
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start = (uintptr_t)s;
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end = start + size;
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/*
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* Free a region of space and merge it with as many neighbors as
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* possible. Keeping the list sorted simplifies this operation.
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*/
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sx_xlock(&dpcpu_lock);
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TAILQ_FOREACH(df, &dpcpu_head, df_link) {
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if (df->df_start > end)
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break;
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/*
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* If we expand at the end of an entry we may have to
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* merge it with the one following it as well.
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*/
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if (df->df_start + df->df_len == start) {
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df->df_len += size;
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dn = TAILQ_NEXT(df, df_link);
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if (df->df_start + df->df_len == dn->df_start) {
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df->df_len += dn->df_len;
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TAILQ_REMOVE(&dpcpu_head, dn, df_link);
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free(dn, M_PCPU);
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}
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sx_xunlock(&dpcpu_lock);
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return;
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}
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if (df->df_start == end) {
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df->df_start = start;
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df->df_len += size;
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sx_xunlock(&dpcpu_lock);
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return;
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}
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}
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dn = malloc(sizeof(*df), M_PCPU, M_WAITOK | M_ZERO);
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dn->df_start = start;
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dn->df_len = size;
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if (df)
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TAILQ_INSERT_BEFORE(df, dn, df_link);
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else
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TAILQ_INSERT_TAIL(&dpcpu_head, dn, df_link);
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sx_xunlock(&dpcpu_lock);
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}
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/*
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* Initialize the per-cpu storage from an updated linker-set region.
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*/
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void
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dpcpu_copy(void *s, int size)
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{
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#ifdef SMP
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uintptr_t dpcpu;
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int i;
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for (i = 0; i < mp_ncpus; ++i) {
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dpcpu = dpcpu_off[i];
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if (dpcpu == 0)
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continue;
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memcpy((void *)(dpcpu + (uintptr_t)s), s, size);
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}
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#else
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memcpy((void *)(dpcpu_off[0] + (uintptr_t)s), s, size);
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#endif
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}
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/*
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* Destroy a struct pcpu.
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*/
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void
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pcpu_destroy(struct pcpu *pcpu)
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{
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STAILQ_REMOVE(&cpuhead, pcpu, pcpu, pc_allcpu);
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cpuid_to_pcpu[pcpu->pc_cpuid] = NULL;
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dpcpu_off[pcpu->pc_cpuid] = 0;
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}
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/*
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* Locate a struct pcpu by cpu id.
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*/
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struct pcpu *
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pcpu_find(u_int cpuid)
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{
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return (cpuid_to_pcpu[cpuid]);
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}
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int
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sysctl_dpcpu_quad(SYSCTL_HANDLER_ARGS)
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{
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uintptr_t dpcpu;
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int64_t count;
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int i;
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count = 0;
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for (i = 0; i < mp_ncpus; ++i) {
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dpcpu = dpcpu_off[i];
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if (dpcpu == 0)
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continue;
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count += *(int64_t *)(dpcpu + (uintptr_t)arg1);
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}
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return (SYSCTL_OUT(req, &count, sizeof(count)));
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}
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int
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sysctl_dpcpu_long(SYSCTL_HANDLER_ARGS)
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{
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uintptr_t dpcpu;
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long count;
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int i;
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count = 0;
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for (i = 0; i < mp_ncpus; ++i) {
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dpcpu = dpcpu_off[i];
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if (dpcpu == 0)
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continue;
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count += *(long *)(dpcpu + (uintptr_t)arg1);
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}
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return (SYSCTL_OUT(req, &count, sizeof(count)));
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}
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int
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sysctl_dpcpu_int(SYSCTL_HANDLER_ARGS)
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{
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uintptr_t dpcpu;
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int count;
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int i;
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count = 0;
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for (i = 0; i < mp_ncpus; ++i) {
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dpcpu = dpcpu_off[i];
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if (dpcpu == 0)
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continue;
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count += *(int *)(dpcpu + (uintptr_t)arg1);
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}
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return (SYSCTL_OUT(req, &count, sizeof(count)));
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}
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#ifdef DDB
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DB_SHOW_COMMAND(dpcpu_off, db_show_dpcpu_off)
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{
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int id;
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CPU_FOREACH(id) {
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db_printf("dpcpu_off[%2d] = 0x%jx (+ DPCPU_START = %p)\n",
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id, (uintmax_t)dpcpu_off[id],
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(void *)(uintptr_t)(dpcpu_off[id] + DPCPU_START));
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}
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}
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static void
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show_pcpu(struct pcpu *pc)
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{
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struct thread *td;
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db_printf("cpuid = %d\n", pc->pc_cpuid);
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db_printf("dynamic pcpu = %p\n", (void *)pc->pc_dynamic);
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db_printf("curthread = ");
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td = pc->pc_curthread;
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if (td != NULL)
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db_printf("%p: pid %d \"%s\"\n", td, td->td_proc->p_pid,
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td->td_name);
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else
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db_printf("none\n");
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db_printf("curpcb = %p\n", pc->pc_curpcb);
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db_printf("fpcurthread = ");
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td = pc->pc_fpcurthread;
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if (td != NULL)
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db_printf("%p: pid %d \"%s\"\n", td, td->td_proc->p_pid,
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td->td_name);
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else
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db_printf("none\n");
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db_printf("idlethread = ");
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td = pc->pc_idlethread;
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if (td != NULL)
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db_printf("%p: tid %d \"%s\"\n", td, td->td_tid, td->td_name);
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else
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db_printf("none\n");
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db_show_mdpcpu(pc);
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#ifdef VIMAGE
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db_printf("curvnet = %p\n", pc->pc_curthread->td_vnet);
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#endif
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#ifdef WITNESS
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db_printf("spin locks held:\n");
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witness_list_locks(&pc->pc_spinlocks, db_printf);
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#endif
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}
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DB_SHOW_COMMAND(pcpu, db_show_pcpu)
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{
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struct pcpu *pc;
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int id;
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if (have_addr)
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id = ((addr >> 4) % 16) * 10 + (addr % 16);
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else
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id = PCPU_GET(cpuid);
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pc = pcpu_find(id);
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if (pc == NULL) {
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db_printf("CPU %d not found\n", id);
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return;
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}
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show_pcpu(pc);
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}
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DB_SHOW_ALL_COMMAND(pcpu, db_show_cpu_all)
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{
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struct pcpu *pc;
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int id;
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db_printf("Current CPU: %d\n\n", PCPU_GET(cpuid));
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for (id = 0; id <= mp_maxid; id++) {
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pc = pcpu_find(id);
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if (pc != NULL) {
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show_pcpu(pc);
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db_printf("\n");
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}
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}
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}
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DB_SHOW_ALIAS(allpcpu, db_show_cpu_all);
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#endif
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