mirror of
https://git.FreeBSD.org/src.git
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7a0f4bee0d
suspend/resume support and Rage 128 pageflipping support (both of which require XFree86 from CVS), along with miscellaneous cleanups.
214 lines
6.8 KiB
C
214 lines
6.8 KiB
C
/* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*-
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* Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com
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*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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*
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* $FreeBSD$
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*/
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#include "dev/drm/mga.h"
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#include "dev/drm/drmP.h"
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#include "dev/drm/drm.h"
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#include "dev/drm/mga_drm.h"
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#include "dev/drm/mga_drv.h"
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#include "dev/drm/mga_ucode.h"
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#define MGA_WARP_CODE_ALIGN 256 /* in bytes */
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#define WARP_UCODE_SIZE( which ) \
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((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN)
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#define WARP_UCODE_INSTALL( which, where ) \
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do { \
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DRM_DEBUG( " pcbase = 0x%08lx vcbase = %p\n", pcbase, vcbase );\
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dev_priv->warp_pipe_phys[where] = pcbase; \
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memcpy( vcbase, which, sizeof(which) ); \
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pcbase += WARP_UCODE_SIZE( which ); \
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vcbase += WARP_UCODE_SIZE( which ); \
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} while (0)
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static unsigned int mga_warp_g400_microcode_size( drm_mga_private_t *dev_priv )
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{
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unsigned int size;
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size = ( WARP_UCODE_SIZE( warp_g400_tgz ) +
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WARP_UCODE_SIZE( warp_g400_tgza ) +
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WARP_UCODE_SIZE( warp_g400_tgzaf ) +
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WARP_UCODE_SIZE( warp_g400_tgzf ) +
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WARP_UCODE_SIZE( warp_g400_tgzs ) +
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WARP_UCODE_SIZE( warp_g400_tgzsa ) +
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WARP_UCODE_SIZE( warp_g400_tgzsaf ) +
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WARP_UCODE_SIZE( warp_g400_tgzsf ) +
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WARP_UCODE_SIZE( warp_g400_t2gz ) +
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WARP_UCODE_SIZE( warp_g400_t2gza ) +
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WARP_UCODE_SIZE( warp_g400_t2gzaf ) +
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WARP_UCODE_SIZE( warp_g400_t2gzf ) +
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WARP_UCODE_SIZE( warp_g400_t2gzs ) +
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WARP_UCODE_SIZE( warp_g400_t2gzsa ) +
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WARP_UCODE_SIZE( warp_g400_t2gzsaf ) +
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WARP_UCODE_SIZE( warp_g400_t2gzsf ) );
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size = PAGE_ALIGN( size );
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DRM_DEBUG( "G400 ucode size = %d bytes\n", size );
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return size;
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}
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static unsigned int mga_warp_g200_microcode_size( drm_mga_private_t *dev_priv )
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{
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unsigned int size;
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size = ( WARP_UCODE_SIZE( warp_g200_tgz ) +
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WARP_UCODE_SIZE( warp_g200_tgza ) +
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WARP_UCODE_SIZE( warp_g200_tgzaf ) +
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WARP_UCODE_SIZE( warp_g200_tgzf ) +
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WARP_UCODE_SIZE( warp_g200_tgzs ) +
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WARP_UCODE_SIZE( warp_g200_tgzsa ) +
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WARP_UCODE_SIZE( warp_g200_tgzsaf ) +
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WARP_UCODE_SIZE( warp_g200_tgzsf ) );
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size = PAGE_ALIGN( size );
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DRM_DEBUG( "G200 ucode size = %d bytes\n", size );
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return size;
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}
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static int mga_warp_install_g400_microcode( drm_mga_private_t *dev_priv )
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{
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unsigned char *vcbase = dev_priv->warp->handle;
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unsigned long pcbase = dev_priv->warp->offset;
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unsigned int size;
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size = mga_warp_g400_microcode_size( dev_priv );
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if ( size > dev_priv->warp->size ) {
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DRM_ERROR( "microcode too large! (%u > %lu)\n",
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size, dev_priv->warp->size );
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return DRM_ERR(ENOMEM);
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}
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memset( dev_priv->warp_pipe_phys, 0,
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sizeof(dev_priv->warp_pipe_phys) );
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WARP_UCODE_INSTALL( warp_g400_tgz, MGA_WARP_TGZ );
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WARP_UCODE_INSTALL( warp_g400_tgzf, MGA_WARP_TGZF );
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WARP_UCODE_INSTALL( warp_g400_tgza, MGA_WARP_TGZA );
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WARP_UCODE_INSTALL( warp_g400_tgzaf, MGA_WARP_TGZAF );
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WARP_UCODE_INSTALL( warp_g400_tgzs, MGA_WARP_TGZS );
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WARP_UCODE_INSTALL( warp_g400_tgzsf, MGA_WARP_TGZSF );
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WARP_UCODE_INSTALL( warp_g400_tgzsa, MGA_WARP_TGZSA );
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WARP_UCODE_INSTALL( warp_g400_tgzsaf, MGA_WARP_TGZSAF );
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WARP_UCODE_INSTALL( warp_g400_t2gz, MGA_WARP_T2GZ );
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WARP_UCODE_INSTALL( warp_g400_t2gzf, MGA_WARP_T2GZF );
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WARP_UCODE_INSTALL( warp_g400_t2gza, MGA_WARP_T2GZA );
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WARP_UCODE_INSTALL( warp_g400_t2gzaf, MGA_WARP_T2GZAF );
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WARP_UCODE_INSTALL( warp_g400_t2gzs, MGA_WARP_T2GZS );
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WARP_UCODE_INSTALL( warp_g400_t2gzsf, MGA_WARP_T2GZSF );
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WARP_UCODE_INSTALL( warp_g400_t2gzsa, MGA_WARP_T2GZSA );
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WARP_UCODE_INSTALL( warp_g400_t2gzsaf, MGA_WARP_T2GZSAF );
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return 0;
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}
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static int mga_warp_install_g200_microcode( drm_mga_private_t *dev_priv )
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{
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unsigned char *vcbase = dev_priv->warp->handle;
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unsigned long pcbase = dev_priv->warp->offset;
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unsigned int size;
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size = mga_warp_g200_microcode_size( dev_priv );
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if ( size > dev_priv->warp->size ) {
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DRM_ERROR( "microcode too large! (%u > %lu)\n",
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size, dev_priv->warp->size );
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return DRM_ERR(ENOMEM);
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}
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memset( dev_priv->warp_pipe_phys, 0,
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sizeof(dev_priv->warp_pipe_phys) );
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WARP_UCODE_INSTALL( warp_g200_tgz, MGA_WARP_TGZ );
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WARP_UCODE_INSTALL( warp_g200_tgzf, MGA_WARP_TGZF );
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WARP_UCODE_INSTALL( warp_g200_tgza, MGA_WARP_TGZA );
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WARP_UCODE_INSTALL( warp_g200_tgzaf, MGA_WARP_TGZAF );
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WARP_UCODE_INSTALL( warp_g200_tgzs, MGA_WARP_TGZS );
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WARP_UCODE_INSTALL( warp_g200_tgzsf, MGA_WARP_TGZSF );
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WARP_UCODE_INSTALL( warp_g200_tgzsa, MGA_WARP_TGZSA );
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WARP_UCODE_INSTALL( warp_g200_tgzsaf, MGA_WARP_TGZSAF );
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return 0;
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}
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int mga_warp_install_microcode( drm_mga_private_t *dev_priv )
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{
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switch ( dev_priv->chipset ) {
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case MGA_CARD_TYPE_G400:
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return mga_warp_install_g400_microcode( dev_priv );
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case MGA_CARD_TYPE_G200:
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return mga_warp_install_g200_microcode( dev_priv );
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default:
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return DRM_ERR(EINVAL);
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}
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}
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#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
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int mga_warp_init( drm_mga_private_t *dev_priv )
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{
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u32 wmisc;
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/* FIXME: Get rid of these damned magic numbers...
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*/
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switch ( dev_priv->chipset ) {
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case MGA_CARD_TYPE_G400:
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MGA_WRITE( MGA_WIADDR2, MGA_WMODE_SUSPEND );
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MGA_WRITE( MGA_WGETMSB, 0x00000E00 );
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MGA_WRITE( MGA_WVRTXSZ, 0x00001807 );
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MGA_WRITE( MGA_WACCEPTSEQ, 0x18000000 );
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break;
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case MGA_CARD_TYPE_G200:
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MGA_WRITE( MGA_WIADDR, MGA_WMODE_SUSPEND );
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MGA_WRITE( MGA_WGETMSB, 0x1606 );
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MGA_WRITE( MGA_WVRTXSZ, 7 );
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break;
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default:
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return DRM_ERR(EINVAL);
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}
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MGA_WRITE( MGA_WMISC, (MGA_WUCODECACHE_ENABLE |
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MGA_WMASTER_ENABLE |
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MGA_WCACHEFLUSH_ENABLE) );
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wmisc = MGA_READ( MGA_WMISC );
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if ( wmisc != WMISC_EXPECTED ) {
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DRM_ERROR( "WARP engine config failed! 0x%x != 0x%x\n",
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wmisc, WMISC_EXPECTED );
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return DRM_ERR(EINVAL);
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}
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return 0;
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}
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