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mirror of https://git.FreeBSD.org/src.git synced 2024-12-24 11:29:10 +00:00
freebsd/sys/x86
John Baldwin e83ea6241a Each processor socket in a QPI system has a special PCI bus for the
"uncore" devices (such as the memory controller) in that socket.  Stop
hardcoding support for two busses, but instead start probing buses at
domain 0, bus 255 and walk down until a bus probe fails.  Also, do not probe
a bus if it has already been enumerated elsewhere (e.g. if ACPI ever
enumerates these buses in the future).
2010-09-07 13:50:02 +00:00
..
acpica When performing a sanity check on the SRAT table to ensure that each 2010-07-29 17:37:35 +00:00
bios
cpufreq Core i5, same as previously Core2Duo, found to not set P-state for single 2010-06-19 13:09:42 +00:00
isa Fix several un-/signedness bugs of r210290 and r210293. Add one more check. 2010-07-20 15:48:29 +00:00
pci Each processor socket in a QPI system has a special PCI bus for the 2010-09-07 13:50:02 +00:00
x86 When DTrace is enabled, make sure we don't overwrite the IDT_DTRACE_RET 2010-08-30 18:12:21 +00:00