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526 lines
12 KiB
C
526 lines
12 KiB
C
/*
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* Copyright (c) 2003
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* Fraunhofer Institute for Open Communication Systems (FhG Fokus).
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Author: Hartmut Brandt <harti@freebsd.org>
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*
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* Driver for IDT77252 based cards like ProSum's.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_inet.h"
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#include "opt_natm.h"
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/errno.h>
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#include <sys/conf.h>
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#include <sys/module.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/sysctl.h>
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#include <sys/queue.h>
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#include <sys/condvar.h>
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#include <sys/endian.h>
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#include <vm/uma.h>
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#include <sys/sockio.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_media.h>
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#include <net/if_atm.h>
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#include <net/route.h>
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#ifdef ENABLE_BPF
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#include <net/bpf.h>
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#endif
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#include <netinet/in.h>
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#include <netinet/if_atm.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/mbpool.h>
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#include <dev/utopia/utopia.h>
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#include <dev/patm/idt77252reg.h>
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#include <dev/patm/if_patmvar.h>
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static void *patm_rcv_handle(struct patm_softc *sc, u_int handle);
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static void patm_rcv_free(struct patm_softc *, void *, u_int handle);
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static struct mbuf *patm_rcv_mbuf(struct patm_softc *, void *, u_int, int);
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static __inline void
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rct_write(struct patm_softc *sc, u_int cid, u_int w, u_int val)
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{
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patm_sram_write(sc, sc->mmap->rct + cid * IDT_RCT_ENTRY_SIZE + w, val);
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}
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static __inline u_int
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rct_read(struct patm_softc *sc, u_int cid, u_int w)
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{
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return (patm_sram_read(sc, sc->mmap->rct +
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cid * IDT_RCT_ENTRY_SIZE + w));
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}
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/* check if we can open this one */
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int
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patm_rx_vcc_can_open(struct patm_softc *sc, struct patm_vcc *vcc)
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{
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return (0);
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}
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/*
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* open the VCC
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*/
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void
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patm_rx_vcc_open(struct patm_softc *sc, struct patm_vcc *vcc)
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{
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uint32_t w1 = IDT_RCT_OPEN;
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patm_debug(sc, VCC, "%u.%u RX opening", vcc->vcc.vpi, vcc->vcc.vci);
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switch (vcc->vcc.aal) {
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case ATMIO_AAL_0:
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w1 |= IDT_RCT_AAL0 | IDT_RCT_FBP2 | IDT_RCT_RCI;
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break;
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case ATMIO_AAL_34:
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w1 |= IDT_RCT_AAL34;
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break;
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case ATMIO_AAL_5:
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w1 |= IDT_RCT_AAL5;
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break;
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case ATMIO_AAL_RAW:
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w1 |= IDT_RCT_AALRAW | IDT_RCT_RCI;
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break;
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}
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if (vcc->cid != 0)
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patm_sram_write4(sc, sc->mmap->rct + vcc->cid *
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IDT_RCT_ENTRY_SIZE, w1, 0, 0, 0xffffffff);
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else {
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/* switch the interface into promiscuous mode */
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patm_nor_write(sc, IDT_NOR_CFG, patm_nor_read(sc, IDT_NOR_CFG) |
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IDT_CFG_ICAPT | IDT_CFG_VPECA);
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}
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vcc->vflags |= PATM_VCC_RX_OPEN;
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}
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/* close the given vcc for transmission */
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void
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patm_rx_vcc_close(struct patm_softc *sc, struct patm_vcc *vcc)
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{
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u_int w1;
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patm_debug(sc, VCC, "%u.%u RX closing", vcc->vcc.vpi, vcc->vcc.vci);
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if (vcc->cid == 0) {
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/* switch off promiscuous mode */
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patm_nor_write(sc, IDT_NOR_CFG, patm_nor_read(sc, IDT_NOR_CFG) &
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~(IDT_CFG_ICAPT | IDT_CFG_VPECA));
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vcc->vflags &= ~PATM_VCC_RX_OPEN;
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return;
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}
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/* close the connection but keep state */
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w1 = rct_read(sc, vcc->cid, 0);
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w1 &= ~IDT_RCT_OPEN;
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rct_write(sc, vcc->cid, 0, w1);
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/* minimum idle count */
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w1 = (w1 & ~IDT_RCT_IACT_CNT_MASK) | (1 << IDT_RCT_IACT_CNT_SHIFT);
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rct_write(sc, vcc->cid, 0, w1);
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/* initialize scan */
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patm_nor_write(sc, IDT_NOR_IRCP, vcc->cid);
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vcc->vflags &= ~PATM_VCC_RX_OPEN;
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vcc->vflags |= PATM_VCC_RX_CLOSING;
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/*
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* check the RSQ
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* This is a hack. The problem is, that although an entry is written
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* to the RSQ, no interrupt is generated. Also we must wait 1 cell
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* time for the SAR to process the scan of our connection.
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*/
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DELAY(1);
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patm_intr_rsq(sc);
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}
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/* transmission side finally closed */
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void
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patm_rx_vcc_closed(struct patm_softc *sc, struct patm_vcc *vcc)
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{
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patm_debug(sc, VCC, "%u.%u RX finally closed",
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vcc->vcc.vpi, vcc->vcc.vci);
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}
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/*
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* Handle the given receive status queue entry
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*/
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void
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patm_rx(struct patm_softc *sc, struct idt_rsqe *rsqe)
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{
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struct mbuf *m;
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void *buf;
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u_int stat, cid, w, cells, len, h;
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struct patm_vcc *vcc;
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struct atm_pseudohdr aph;
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u_char *trail;
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cid = le32toh(rsqe->cid);
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stat = le32toh(rsqe->stat);
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h = le32toh(rsqe->handle);
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cid = PATM_CID(sc, IDT_RSQE_VPI(cid), IDT_RSQE_VCI(cid));
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vcc = sc->vccs[cid];
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if (IDT_RSQE_TYPE(stat) == IDT_RSQE_IDLE) {
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/* connection has gone idle */
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if (stat & IDT_RSQE_BUF)
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patm_rcv_free(sc, patm_rcv_handle(sc, h), h);
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w = rct_read(sc, cid, 0);
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if (w != 0 && !(w & IDT_RCT_OPEN))
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rct_write(sc, cid, 0, 0);
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if (vcc != NULL && (vcc->vflags & PATM_VCC_RX_CLOSING)) {
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patm_debug(sc, VCC, "%u.%u RX closed", vcc->vcc.vpi,
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vcc->vcc.vci);
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vcc->vflags &= ~PATM_VCC_RX_CLOSING;
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if (vcc->vcc.flags & ATMIO_FLAG_ASYNC) {
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patm_rx_vcc_closed(sc, vcc);
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if (!(vcc->vflags & PATM_VCC_OPEN))
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patm_vcc_closed(sc, vcc);
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} else
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cv_signal(&sc->vcc_cv);
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}
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return;
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}
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buf = patm_rcv_handle(sc, h);
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if (vcc == NULL || (vcc->vflags & PATM_VCC_RX_OPEN) == 0) {
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patm_rcv_free(sc, buf, h);
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return;
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}
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cells = IDT_RSQE_CNT(stat);
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KASSERT(cells > 0, ("zero cell count"));
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if (vcc->vcc.aal == ATMIO_AAL_0) {
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/* deliver this packet as it is */
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if ((m = patm_rcv_mbuf(sc, buf, h, 1)) == NULL)
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return;
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m->m_len = cells * 48;
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m->m_pkthdr.len = m->m_len;
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m->m_pkthdr.rcvif = &sc->ifatm.ifnet;
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} else if (vcc->vcc.aal == ATMIO_AAL_34) {
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/* XXX AAL3/4 */
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patm_rcv_free(sc, buf, h);
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return;
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} else if (vcc->vcc.aal == ATMIO_AAL_5) {
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if (stat & IDT_RSQE_CRC) {
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sc->ifatm.ifnet.if_ierrors++;
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if (vcc->chain != NULL) {
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m_freem(vcc->chain);
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vcc->chain = vcc->last = NULL;
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}
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return;
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}
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/* append to current chain */
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if (vcc->chain == NULL) {
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if ((m = patm_rcv_mbuf(sc, buf, h, 1)) == NULL)
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return;
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m->m_len = cells * 48;
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m->m_pkthdr.len = m->m_len;
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m->m_pkthdr.rcvif = &sc->ifatm.ifnet;
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vcc->chain = vcc->last = m;
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} else {
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if ((m = patm_rcv_mbuf(sc, buf, h, 0)) == NULL)
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return;
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m->m_len = cells * 48;
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vcc->last->m_next = m;
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vcc->last = m;
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vcc->chain->m_pkthdr.len += m->m_len;
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}
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if (!(stat & IDT_RSQE_EPDU))
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return;
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trail = mtod(m, u_char *) + m->m_len - 6;
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len = (trail[0] << 8) + trail[1];
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if ((u_int)vcc->chain->m_pkthdr.len < len + 8) {
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patm_printf(sc, "%s: bad aal5 lengths %u %u\n",
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__func__, (u_int)m->m_pkthdr.len, len);
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m_freem(vcc->chain);
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vcc->chain = vcc->last = NULL;
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return;
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}
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m->m_len -= vcc->chain->m_pkthdr.len - len;
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KASSERT(m->m_len >= 0, ("bad last mbuf"));
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m = vcc->chain;
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vcc->chain = vcc->last = NULL;
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m->m_pkthdr.len = len;
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} else
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panic("bad aal");
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#if 0
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{
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u_int i;
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for (i = 0; i < m->m_len; i++) {
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printf("%02x ", mtod(m, u_char *)[i]);
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}
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printf("\n");
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}
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#endif
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sc->ifatm.ifnet.if_ipackets++;
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/* this is in if_atmsubr.c */
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/* sc->ifatm.ifnet.if_ibytes += m->m_pkthdr.len; */
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vcc->ibytes += m->m_pkthdr.len;
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vcc->ipackets++;
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ATM_PH_FLAGS(&aph) = vcc->vcc.flags & 0xff;
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ATM_PH_VPI(&aph) = IDT_RSQE_VPI(cid);
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ATM_PH_SETVCI(&aph, IDT_RSQE_VCI(cid));
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#ifdef ENABLE_BPF
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if (!(vcc->vcc.flags & ATMIO_FLAG_NG) &&
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(vcc->vcc.aal == ATMIO_AAL_5) &&
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(vcc->vcc.flags & ATM_PH_LLCSNAP))
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BPF_MTAP(&sc->ifatm.ifnet, m);
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#endif
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atm_input(&sc->ifatm.ifnet, &aph, m, vcc->rxhand);
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}
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/*
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* Get the buffer for a receive handle. This is either an mbuf for
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* a large handle or a pool buffer for the others.
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*/
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static void *
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patm_rcv_handle(struct patm_softc *sc, u_int handle)
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{
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void *buf;
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u_int c;
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if ((handle & ~MBUF_HMASK) == LMBUF_HANDLE) {
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struct lmbuf *b;
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c = handle & MBUF_HMASK;
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b = &sc->lbufs[c];
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buf = b->m;
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b->m = NULL;
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bus_dmamap_sync(sc->lbuf_tag, b->map, BUS_DMASYNC_POSTREAD);
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patm_lbuf_free(sc, b);
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} else if ((handle & ~MBUF_HMASK) == MBUF_VHANDLE) {
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mbp_sync(sc->vbuf_pool, handle,
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0, VMBUF_SIZE, BUS_DMASYNC_POSTREAD);
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buf = mbp_get(sc->vbuf_pool, handle);
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} else {
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mbp_sync(sc->sbuf_pool, handle,
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0, SMBUF_SIZE, BUS_DMASYNC_POSTREAD);
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buf = mbp_get(sc->sbuf_pool, handle);
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}
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return (buf);
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}
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/*
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* Free a buffer.
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*/
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static void
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patm_rcv_free(struct patm_softc *sc, void *p, u_int handle)
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{
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if ((handle & ~MBUF_HMASK) == LMBUF_HANDLE)
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m_free((struct mbuf *)p);
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else if ((handle & ~MBUF_HMASK) == MBUF_VHANDLE)
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mbp_free(sc->vbuf_pool, p);
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else
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mbp_free(sc->sbuf_pool, p);
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}
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/*
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* Make an mbuf around the buffer
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*/
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static struct mbuf *
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patm_rcv_mbuf(struct patm_softc *sc, void *buf, u_int h, int hdr)
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{
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struct mbuf *m;
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if ((h & ~MBUF_HMASK) == MBUF_LHANDLE)
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return ((struct mbuf *)buf);
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if (hdr)
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MGETHDR(m, M_DONTWAIT, MT_DATA);
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else
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MGET(m, M_DONTWAIT, MT_DATA);
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if (m == NULL) {
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patm_rcv_free(sc, buf, h);
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return (NULL);
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}
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if ((h & ~MBUF_HMASK) == MBUF_VHANDLE) {
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m_extadd(m, (caddr_t)buf, VMBUF_SIZE, mbp_ext_free,
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sc->vbuf_pool, M_PKTHDR, EXT_NET_DRV);
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m->m_data += VMBUF_OFFSET;
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} else {
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m_extadd(m, (caddr_t)buf, SMBUF_SIZE, mbp_ext_free,
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sc->sbuf_pool, M_PKTHDR, EXT_NET_DRV);
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m->m_data += SMBUF_OFFSET;
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}
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if (!(m->m_flags & M_EXT)) {
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patm_rcv_free(sc, buf, h);
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m_free(m);
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return (NULL);
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}
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return (m);
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}
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/*
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* Process the raw cell at the given address.
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*/
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void
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patm_rx_raw(struct patm_softc *sc, u_char *cell)
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{
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u_int vpi, vci, cid;
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struct patm_vcc *vcc;
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struct mbuf *m;
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u_char *dst;
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struct timespec ts;
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struct atm_pseudohdr aph;
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uint64_t cts;
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sc->stats.raw_cells++;
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/*
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* For some non-appearant reason the cell header
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* is in the wrong endian.
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*/
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*(uint32_t *)cell = bswap32(*(uint32_t *)cell);
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vpi = ((cell[0] & 0xf) << 4) | ((cell[1] & 0xf0) >> 4);
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vci = ((cell[1] & 0xf) << 12) | (cell[2] << 4) | ((cell[3] & 0xf0) >> 4);
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cid = PATM_CID(sc, vpi, vci);
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vcc = sc->vccs[cid];
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if (vcc == NULL || !(vcc->vflags & PATM_VCC_RX_OPEN) ||
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vcc->vcc.aal != ATMIO_AAL_RAW) {
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vcc = sc->vccs[0];
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if (vcc == NULL || !(vcc->vflags & PATM_VCC_RX_OPEN)) {
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sc->stats.raw_no_vcc++;
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return;
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}
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}
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MGETHDR(m, M_DONTWAIT, MT_DATA);
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if (m == NULL) {
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sc->stats.raw_no_buf++;
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return;
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}
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m->m_pkthdr.rcvif = &sc->ifatm.ifnet;
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switch (vcc->vflags & PATM_RAW_FORMAT) {
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default:
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case PATM_RAW_CELL:
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m->m_len = m->m_pkthdr.len = 53;
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MH_ALIGN(m, 53);
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dst = mtod(m, u_char *);
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
*dst++ = 0; /* HEC */
|
|
bcopy(cell + 12, dst, 48);
|
|
break;
|
|
|
|
case PATM_RAW_NOHEC:
|
|
m->m_len = m->m_pkthdr.len = 52;
|
|
MH_ALIGN(m, 52);
|
|
dst = mtod(m, u_char *);
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
bcopy(cell + 12, dst, 48);
|
|
break;
|
|
|
|
case PATM_RAW_CS:
|
|
m->m_len = m->m_pkthdr.len = 64;
|
|
MH_ALIGN(m, 64);
|
|
dst = mtod(m, u_char *);
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
*dst++ = *cell++;
|
|
*dst++ = 0; /* HEC */
|
|
*dst++ = 0; /* flags */
|
|
*dst++ = 0; /* reserved */
|
|
*dst++ = 0; /* reserved */
|
|
nanotime(&ts);
|
|
cts = ts.tv_sec * 1000000000ULL + ts.tv_nsec;
|
|
bcopy(dst, &cts, 8);
|
|
bcopy(cell + 12, dst + 8, 48);
|
|
break;
|
|
}
|
|
|
|
sc->ifatm.ifnet.if_ipackets++;
|
|
/* this is in if_atmsubr.c */
|
|
/* sc->ifatm.ifnet.if_ibytes += m->m_pkthdr.len; */
|
|
|
|
vcc->ibytes += m->m_pkthdr.len;
|
|
vcc->ipackets++;
|
|
|
|
ATM_PH_FLAGS(&aph) = vcc->vcc.flags & 0xff;
|
|
ATM_PH_VPI(&aph) = vcc->vcc.vpi;
|
|
ATM_PH_SETVCI(&aph, vcc->vcc.vci);
|
|
|
|
atm_input(&sc->ifatm.ifnet, &aph, m, vcc->rxhand);
|
|
}
|