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b45de1ebcd
This should be a big no-op pass; and reduces the size of if_ath.c. I'm hopefully soon going to take a whack at the USB support for ath(4) and this'll require some reuse of the busdma memory code.
443 lines
12 KiB
C
443 lines
12 KiB
C
/*-
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* Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Driver for the Atheros Wireless LAN controller.
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*
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* This software is derived from work of Atsushi Onoe; his contribution
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* is greatly appreciated.
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*/
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#include "opt_inet.h"
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#include "opt_ath.h"
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/*
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* This is needed for register operations which are performed
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* by the driver - eg, calls to ath_hal_gettsf32().
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*
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* It's also required for any AH_DEBUG checks in here, eg the
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* module dependencies.
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*/
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#include "opt_ah.h"
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#include "opt_wlan.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/sysctl.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/errno.h>
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#include <sys/callout.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/kthread.h>
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#include <sys/taskqueue.h>
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#include <sys/priv.h>
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#include <sys/module.h>
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#include <sys/ktr.h>
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#include <sys/smp.h> /* for mp_ncpus */
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#include <machine/bus.h>
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#include <net/if.h>
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#include <net/if_var.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#include <net/if_types.h>
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#include <net/if_arp.h>
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#include <net/ethernet.h>
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#include <net/if_llc.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_regdomain.h>
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#ifdef IEEE80211_SUPPORT_SUPERG
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#include <net80211/ieee80211_superg.h>
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#endif
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#ifdef IEEE80211_SUPPORT_TDMA
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#include <net80211/ieee80211_tdma.h>
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#endif
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#include <net/bpf.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_ether.h>
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#endif
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#include <dev/ath/if_athvar.h>
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#include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */
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#include <dev/ath/ath_hal/ah_diagcodes.h>
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#include <dev/ath/if_ath_debug.h>
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#include <dev/ath/if_ath_misc.h>
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#if 0
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#include <dev/ath/if_ath_tsf.h>
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#include <dev/ath/if_ath_tx.h>
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#include <dev/ath/if_ath_sysctl.h>
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#include <dev/ath/if_ath_led.h>
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#include <dev/ath/if_ath_keycache.h>
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#include <dev/ath/if_ath_rx.h>
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#include <dev/ath/if_ath_rx_edma.h>
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#include <dev/ath/if_ath_tx_edma.h>
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#include <dev/ath/if_ath_beacon.h>
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#include <dev/ath/if_ath_btcoex.h>
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#include <dev/ath/if_ath_spectral.h>
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#include <dev/ath/if_ath_lna_div.h>
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#include <dev/ath/if_athdfs.h>
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#endif
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#include <dev/ath/if_ath_descdma.h>
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MALLOC_DECLARE(M_ATHDEV);
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/*
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* This is the descriptor setup / busdma memory intialisation and
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* teardown routines.
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*/
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static void
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ath_load_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
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{
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bus_addr_t *paddr = (bus_addr_t*) arg;
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KASSERT(error == 0, ("error %u on bus_dma callback", error));
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*paddr = segs->ds_addr;
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}
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/*
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* Allocate the descriptors and appropriate DMA tag/setup.
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*
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* For some situations (eg EDMA TX completion), there isn't a requirement
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* for the ath_buf entries to be allocated.
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*/
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int
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ath_descdma_alloc_desc(struct ath_softc *sc,
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struct ath_descdma *dd, ath_bufhead *head,
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const char *name, int ds_size, int ndesc)
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{
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#define DS2PHYS(_dd, _ds) \
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((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
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#define ATH_DESC_4KB_BOUND_CHECK(_daddr, _len) \
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((((u_int32_t)(_daddr) & 0xFFF) > (0x1000 - (_len))) ? 1 : 0)
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int error;
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dd->dd_descsize = ds_size;
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DPRINTF(sc, ATH_DEBUG_RESET,
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"%s: %s DMA: %u desc, %d bytes per descriptor\n",
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__func__, name, ndesc, dd->dd_descsize);
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dd->dd_name = name;
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dd->dd_desc_len = dd->dd_descsize * ndesc;
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/*
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* Merlin work-around:
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* Descriptors that cross the 4KB boundary can't be used.
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* Assume one skipped descriptor per 4KB page.
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*/
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if (! ath_hal_split4ktrans(sc->sc_ah)) {
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int numpages = dd->dd_desc_len / 4096;
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dd->dd_desc_len += ds_size * numpages;
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}
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/*
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* Setup DMA descriptor area.
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*
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* BUS_DMA_ALLOCNOW is not used; we never use bounce
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* buffers for the descriptors themselves.
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*/
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error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), /* parent */
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PAGE_SIZE, 0, /* alignment, bounds */
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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dd->dd_desc_len, /* maxsize */
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1, /* nsegments */
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dd->dd_desc_len, /* maxsegsize */
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0, /* flags */
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NULL, /* lockfunc */
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NULL, /* lockarg */
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&dd->dd_dmat);
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if (error != 0) {
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device_printf(sc->sc_dev,
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"cannot allocate %s DMA tag\n", dd->dd_name);
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return error;
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}
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/* allocate descriptors */
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error = bus_dmamem_alloc(dd->dd_dmat, (void**) &dd->dd_desc,
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BUS_DMA_NOWAIT | BUS_DMA_COHERENT,
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&dd->dd_dmamap);
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if (error != 0) {
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device_printf(sc->sc_dev,
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"unable to alloc memory for %u %s descriptors, error %u\n",
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ndesc, dd->dd_name, error);
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goto fail1;
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}
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error = bus_dmamap_load(dd->dd_dmat, dd->dd_dmamap,
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dd->dd_desc, dd->dd_desc_len,
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ath_load_cb, &dd->dd_desc_paddr,
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BUS_DMA_NOWAIT);
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if (error != 0) {
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device_printf(sc->sc_dev,
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"unable to map %s descriptors, error %u\n",
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dd->dd_name, error);
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goto fail2;
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}
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DPRINTF(sc, ATH_DEBUG_RESET, "%s: %s DMA map: %p (%lu) -> %p (%lu)\n",
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__func__, dd->dd_name, (uint8_t *) dd->dd_desc,
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(u_long) dd->dd_desc_len, (caddr_t) dd->dd_desc_paddr,
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/*XXX*/ (u_long) dd->dd_desc_len);
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return (0);
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fail2:
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bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
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fail1:
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bus_dma_tag_destroy(dd->dd_dmat);
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memset(dd, 0, sizeof(*dd));
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return error;
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#undef DS2PHYS
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#undef ATH_DESC_4KB_BOUND_CHECK
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}
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int
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ath_descdma_setup(struct ath_softc *sc,
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struct ath_descdma *dd, ath_bufhead *head,
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const char *name, int ds_size, int nbuf, int ndesc)
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{
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#define DS2PHYS(_dd, _ds) \
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((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
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#define ATH_DESC_4KB_BOUND_CHECK(_daddr, _len) \
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((((u_int32_t)(_daddr) & 0xFFF) > (0x1000 - (_len))) ? 1 : 0)
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uint8_t *ds;
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struct ath_buf *bf;
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int i, bsize, error;
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/* Allocate descriptors */
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error = ath_descdma_alloc_desc(sc, dd, head, name, ds_size,
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nbuf * ndesc);
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/* Assume any errors during allocation were dealt with */
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if (error != 0) {
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return (error);
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}
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ds = (uint8_t *) dd->dd_desc;
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/* allocate rx buffers */
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bsize = sizeof(struct ath_buf) * nbuf;
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bf = malloc(bsize, M_ATHDEV, M_NOWAIT | M_ZERO);
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if (bf == NULL) {
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device_printf(sc->sc_dev,
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"malloc of %s buffers failed, size %u\n",
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dd->dd_name, bsize);
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goto fail3;
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}
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dd->dd_bufptr = bf;
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TAILQ_INIT(head);
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for (i = 0; i < nbuf; i++, bf++, ds += (ndesc * dd->dd_descsize)) {
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bf->bf_desc = (struct ath_desc *) ds;
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bf->bf_daddr = DS2PHYS(dd, ds);
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if (! ath_hal_split4ktrans(sc->sc_ah)) {
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/*
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* Merlin WAR: Skip descriptor addresses which
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* cause 4KB boundary crossing along any point
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* in the descriptor.
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*/
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if (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr,
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dd->dd_descsize)) {
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/* Start at the next page */
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ds += 0x1000 - (bf->bf_daddr & 0xFFF);
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bf->bf_desc = (struct ath_desc *) ds;
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bf->bf_daddr = DS2PHYS(dd, ds);
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}
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}
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error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
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&bf->bf_dmamap);
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if (error != 0) {
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device_printf(sc->sc_dev, "unable to create dmamap "
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"for %s buffer %u, error %u\n",
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dd->dd_name, i, error);
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ath_descdma_cleanup(sc, dd, head);
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return error;
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}
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bf->bf_lastds = bf->bf_desc; /* Just an initial value */
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TAILQ_INSERT_TAIL(head, bf, bf_list);
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}
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/*
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* XXX TODO: ensure that ds doesn't overflow the descriptor
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* allocation otherwise weird stuff will occur and crash your
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* machine.
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*/
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return 0;
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/* XXX this should likely just call ath_descdma_cleanup() */
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fail3:
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bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
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bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
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bus_dma_tag_destroy(dd->dd_dmat);
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memset(dd, 0, sizeof(*dd));
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return error;
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#undef DS2PHYS
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#undef ATH_DESC_4KB_BOUND_CHECK
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}
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/*
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* Allocate ath_buf entries but no descriptor contents.
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*
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* This is for RX EDMA where the descriptors are the header part of
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* the RX buffer.
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*/
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int
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ath_descdma_setup_rx_edma(struct ath_softc *sc,
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struct ath_descdma *dd, ath_bufhead *head,
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const char *name, int nbuf, int rx_status_len)
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{
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struct ath_buf *bf;
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int i, bsize, error;
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DPRINTF(sc, ATH_DEBUG_RESET, "%s: %s DMA: %u buffers\n",
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__func__, name, nbuf);
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dd->dd_name = name;
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/*
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* This is (mostly) purely for show. We're not allocating any actual
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* descriptors here as EDMA RX has the descriptor be part
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* of the RX buffer.
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*
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* However, dd_desc_len is used by ath_descdma_free() to determine
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* whether we have already freed this DMA mapping.
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*/
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dd->dd_desc_len = rx_status_len * nbuf;
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dd->dd_descsize = rx_status_len;
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/* allocate rx buffers */
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bsize = sizeof(struct ath_buf) * nbuf;
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bf = malloc(bsize, M_ATHDEV, M_NOWAIT | M_ZERO);
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if (bf == NULL) {
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device_printf(sc->sc_dev,
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"malloc of %s buffers failed, size %u\n",
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dd->dd_name, bsize);
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error = ENOMEM;
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goto fail3;
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}
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dd->dd_bufptr = bf;
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TAILQ_INIT(head);
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for (i = 0; i < nbuf; i++, bf++) {
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bf->bf_desc = NULL;
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bf->bf_daddr = 0;
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bf->bf_lastds = NULL; /* Just an initial value */
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error = bus_dmamap_create(sc->sc_dmat, BUS_DMA_NOWAIT,
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&bf->bf_dmamap);
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if (error != 0) {
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device_printf(sc->sc_dev, "unable to create dmamap "
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"for %s buffer %u, error %u\n",
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dd->dd_name, i, error);
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ath_descdma_cleanup(sc, dd, head);
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return error;
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}
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TAILQ_INSERT_TAIL(head, bf, bf_list);
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}
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return 0;
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fail3:
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memset(dd, 0, sizeof(*dd));
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return error;
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}
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void
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ath_descdma_cleanup(struct ath_softc *sc,
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struct ath_descdma *dd, ath_bufhead *head)
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{
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struct ath_buf *bf;
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struct ieee80211_node *ni;
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int do_warning = 0;
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if (dd->dd_dmamap != 0) {
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bus_dmamap_unload(dd->dd_dmat, dd->dd_dmamap);
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bus_dmamem_free(dd->dd_dmat, dd->dd_desc, dd->dd_dmamap);
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bus_dma_tag_destroy(dd->dd_dmat);
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}
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if (head != NULL) {
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TAILQ_FOREACH(bf, head, bf_list) {
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if (bf->bf_m) {
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/*
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* XXX warn if there's buffers here.
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* XXX it should have been freed by the
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* owner!
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*/
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if (do_warning == 0) {
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do_warning = 1;
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device_printf(sc->sc_dev,
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"%s: %s: mbuf should've been"
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" unmapped/freed!\n",
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__func__,
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dd->dd_name);
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}
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bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
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BUS_DMASYNC_POSTREAD);
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bus_dmamap_unload(sc->sc_dmat, bf->bf_dmamap);
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m_freem(bf->bf_m);
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bf->bf_m = NULL;
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}
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if (bf->bf_dmamap != NULL) {
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bus_dmamap_destroy(sc->sc_dmat, bf->bf_dmamap);
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bf->bf_dmamap = NULL;
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}
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ni = bf->bf_node;
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bf->bf_node = NULL;
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if (ni != NULL) {
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/*
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* Reclaim node reference.
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*/
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ieee80211_free_node(ni);
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}
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}
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}
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if (head != NULL)
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TAILQ_INIT(head);
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if (dd->dd_bufptr != NULL)
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free(dd->dd_bufptr, M_ATHDEV);
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memset(dd, 0, sizeof(*dd));
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}
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