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45d426a34e
mips32r2 and mips64r2 (and close relatives) processors. There presently is support for ADMtek ADM5120, A mips 4Kc in a malta board, the RB533 routerboard (based on IDT RC32434) and some preliminary support for sibtye/broadcom designs. Other hardware support will be forthcomcing. This port boots multiuser under gxemul emulating the malta board and also bootstraps on the hardware whose support is forthcoming... Oleksandr Tymoshenko, Wojciech Koszek, Warner Losh, Olivier Houchard, Randall Stewert and others that have contributed to the mips2 and/or mips2-jnpr perforce branches. Juniper contirbuted a generic mips port late in the life cycle of the misp2 branch. Warner Losh merged the mips2 and Juniper code bases, and others list above have worked for the past several months to get to multiuser. In addition, the mips2 work owe a debt to the trail blazing efforts of the original mips branch in perforce done by Juli Mallett.
81 lines
3.0 KiB
C
81 lines
3.0 KiB
C
/* $OpenBSD: signal.h,v 1.2 1999/01/27 04:10:03 imp Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)signal.h 8.1 (Berkeley) 6/10/93
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* JNPR: signal.h,v 1.4 2007/01/08 04:58:37 katta
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* $FreeBSD$
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*/
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#ifndef _MACHINE_SIGNAL_H_
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#define _MACHINE_SIGNAL_H_
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#include <sys/cdefs.h>
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#include <sys/_sigset.h>
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/*
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* Machine-dependent signal definitions
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*/
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typedef int sig_atomic_t;
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#if !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE)
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/*
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* Information pushed on stack when a signal is delivered.
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* This is used by the kernel to restore state following
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* execution of the signal handler. It is also made available
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* to the handler to allow it to restore state properly if
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* a non-standard exit is performed.
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*/
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struct sigcontext {
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/*
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* The fields following 'sc_mask' must match the definition
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* of struct __mcontext. That way we can support
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* struct sigcontext and ucontext_t at the same
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* time.
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*/
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__sigset_t sc_mask; /* signal mask to restore */
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int sc_onstack; /* sigstack state to restore */
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__register_t sc_pc; /* pc at time of signal */
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__register_t sc_regs[32]; /* processor regs 0 to 31 */
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__register_t mullo, mulhi; /* mullo and mulhi registers... */
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int sc_fpused; /* fp has been used */
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f_register_t sc_fpregs[33]; /* fp regs 0 to 31 and csr */
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__register_t sc_fpc_eir; /* fp exception instruction reg */
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int xxx[8]; /* XXX reserved */
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};
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#endif /* !_ANSI_SOURCE && !_POSIX_SOURCE */
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#endif /* !_MACHINE_SIGNAL_H_ */
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