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a72c060fb0
doesn't support NWAY, the RealTek PHY (both the integrated ones on 8139 chips and the RTL8201L 10/100 PHY) will not report the link speed via the ANLPAR or BMSR registers. For the 8201L, we need to look in magic vendor-specific PHY register 0x19. For the 8139 MAC+PHY combo, we have to be able to test the RL_MEDIASTAT register. The changes to rlphy.c are based largely on the patch from PR 30836, however I tried to eliminate some magic numbers by creating an entry for the 8201 PHY in miidevs. Also updated if_rl.c to allow the rlphy driver to read the RL_MEDIASTAT register via the rl_miibus_readreg() routine. |
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.. | ||
agp_ali.c | ||
agp_amd.c | ||
agp_i810.c | ||
agp_if.m | ||
agp_intel.c | ||
agp_sis.c | ||
agp_via.c | ||
agp.c | ||
agppriv.h | ||
agpreg.h | ||
agpvar.h | ||
alpm.c | ||
amd.c | ||
amd.h | ||
amdpm.c | ||
cy_pci.c | ||
dc21040reg.h | ||
if_dc.c | ||
if_dcreg.h | ||
if_de.c | ||
if_devar.h | ||
if_en_pci.c | ||
if_mn.c | ||
if_pcn.c | ||
if_pcnreg.h | ||
if_rl.c | ||
if_rlreg.h | ||
if_sf.c | ||
if_sfreg.h | ||
if_sis.c | ||
if_sisreg.h | ||
if_sk.c | ||
if_skreg.h | ||
if_ste.c | ||
if_stereg.h | ||
if_ti.c | ||
if_tireg.h | ||
if_tl.c | ||
if_tlreg.h | ||
if_tx.c | ||
if_txvar.h | ||
if_vr.c | ||
if_vrreg.h | ||
if_wb.c | ||
if_wbreg.h | ||
if_xl.c | ||
if_xlreg.h | ||
intpm.c | ||
intpmreg.h | ||
locate.pl | ||
meteor_reg.h | ||
meteor.c | ||
ncr.c | ||
ncrreg.h | ||
ohci_pci.c | ||
simos.c | ||
simos.h | ||
ti_fw2.h | ||
ti_fw.h | ||
uhci_pci.c | ||
viapm.c | ||
xmaciireg.h | ||
xrpu.c |