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The x86 busdma subsystem allows using multiple implementations. By default the classic bounce buffer approach is used, however on systems with IOMMU it could be in runtime switched to more efficient hardware accelerated implementation. This commit adds ARM64 port of the x86 busdma framework and bounce buffer backend. It is ready to use on IO coherent systems. If the IO coherency cannot be guaranteed, the cache management operations have to be added to this code in places marked by /* XXX ARM64TODO (...) */ comments. Also IOMMU support might be added by registering another busdma implementation like it is already done on the x86. Reviewed by: andrew, emaste Obtained from: Semihalf Sponsored by: The FreeBSD Foundation
97 lines
4.0 KiB
C
97 lines
4.0 KiB
C
/*-
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* Copyright (c) 2013 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Konstantin Belousov <kib@FreeBSD.org>
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* under sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_BUS_DMA_IMPL_H_
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#define _MACHINE_BUS_DMA_IMPL_H_
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struct bus_dma_tag_common {
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struct bus_dma_impl *impl;
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struct bus_dma_tag_common *parent;
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bus_size_t alignment;
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bus_addr_t boundary;
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bus_addr_t lowaddr;
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bus_addr_t highaddr;
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bus_dma_filter_t *filter;
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void *filterarg;
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bus_size_t maxsize;
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u_int nsegments;
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bus_size_t maxsegsz;
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int flags;
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bus_dma_lock_t *lockfunc;
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void *lockfuncarg;
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int ref_count;
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};
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struct bus_dma_impl {
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int (*tag_create)(bus_dma_tag_t parent,
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bus_size_t alignment, bus_addr_t boundary, bus_addr_t lowaddr,
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bus_addr_t highaddr, bus_dma_filter_t *filter,
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void *filterarg, bus_size_t maxsize, int nsegments,
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bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
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void *lockfuncarg, bus_dma_tag_t *dmat);
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int (*tag_destroy)(bus_dma_tag_t dmat);
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int (*map_create)(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp);
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int (*map_destroy)(bus_dma_tag_t dmat, bus_dmamap_t map);
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int (*mem_alloc)(bus_dma_tag_t dmat, void** vaddr, int flags,
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bus_dmamap_t *mapp);
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void (*mem_free)(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map);
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int (*load_ma)(bus_dma_tag_t dmat, bus_dmamap_t map,
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struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags,
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bus_dma_segment_t *segs, int *segp);
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int (*load_phys)(bus_dma_tag_t dmat, bus_dmamap_t map,
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vm_paddr_t buf, bus_size_t buflen, int flags,
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bus_dma_segment_t *segs, int *segp);
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int (*load_buffer)(bus_dma_tag_t dmat, bus_dmamap_t map,
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void *buf, bus_size_t buflen, pmap_t pmap, int flags,
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bus_dma_segment_t *segs, int *segp);
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void (*map_waitok)(bus_dma_tag_t dmat, bus_dmamap_t map,
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struct memdesc *mem, bus_dmamap_callback_t *callback,
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void *callback_arg);
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bus_dma_segment_t *(*map_complete)(bus_dma_tag_t dmat, bus_dmamap_t map,
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bus_dma_segment_t *segs, int nsegs, int error);
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void (*map_unload)(bus_dma_tag_t dmat, bus_dmamap_t map);
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void (*map_sync)(bus_dma_tag_t dmat, bus_dmamap_t map,
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bus_dmasync_op_t op);
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};
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void bus_dma_dflt_lock(void *arg, bus_dma_lock_op_t op);
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int bus_dma_run_filter(struct bus_dma_tag_common *dmat, bus_addr_t paddr);
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int common_bus_dma_tag_create(struct bus_dma_tag_common *parent,
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bus_size_t alignment,
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bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
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bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize,
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int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
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void *lockfuncarg, size_t sz, void **dmat);
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extern struct bus_dma_impl bus_dma_bounce_impl;
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#endif
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