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They're both different cores: * mips24k is an 8-stage pipeline, mips32r1 ABI, non-superscalar core. * mips74k is a dual-issue 15-stage superscalar design, mips32r2 ABI. They have different sets of quirks and bugs; these #define entries will be used to work around these. Now, strictly speaking, we should have CPU ABI families (mips32r1, mips32r2, etc) and CPU core types (mips4k, mips24k, mips74k, etc.) But this is the starting point of that particular tidy-up. Reviewed by: imp@ Approved by: re@ (gjb)
110 lines
3.2 KiB
Plaintext
110 lines
3.2 KiB
Plaintext
# Copyright (c) 2001, 2008, Juniper Networks, Inc.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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# 3. Neither the name of the Juniper Networks, Inc. nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY JUNIPER NETWORKS AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL JUNIPER NETWORKS OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#
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# JNPR: options.mips,v 1.2 2006/09/15 12:52:34
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# $FreeBSD$
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CPU_MIPS4KC opt_global.h
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CPU_MIPS24KC opt_global.h
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CPU_MIPS74KC opt_global.h
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CPU_MIPS32 opt_global.h
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CPU_MIPS64 opt_global.h
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CPU_SENTRY5 opt_global.h
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CPU_HAVEFPU opt_global.h
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CPU_SB1 opt_global.h
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CPU_CNMIPS opt_global.h
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CPU_RMI opt_global.h
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CPU_NLM opt_global.h
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CPU_BERI opt_global.h
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# which MACHINE_ARCH architecture
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MIPS
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MIPSEL
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MIPS64
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MIPS64EL
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MIPSN32
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COMPAT_FREEBSD32 opt_compat.h
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YAMON opt_global.h
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CFE opt_global.h
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CFE_CONSOLE opt_global.h
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CFE_ENV opt_global.h
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CFE_ENV_SIZE opt_global.h
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GFB_DEBUG opt_gfb.h
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GFB_NO_FONT_LOADING opt_gfb.h
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GFB_NO_MODE_CHANGE opt_gfb.h
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NOFPU opt_global.h
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TICK_USE_YAMON_FREQ opt_global.h
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TICK_USE_MALTA_RTC opt_global.h
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#
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# The highest memory address that can be used by the kernel in units of KB.
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#
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MAXMEM opt_global.h
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#
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# Options that control the Cavium Simple Executive.
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#
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OCTEON_MODEL opt_cvmx.h
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OCTEON_VENDOR_LANNER opt_cvmx.h
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OCTEON_VENDOR_UBIQUITI opt_cvmx.h
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OCTEON_VENDOR_RADISYS opt_cvmx.h
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OCTEON_VENDOR_GEFES opt_cvmx.h
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OCTEON_BOARD_CAPK_0100ND opt_cvmx.h
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#
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# Options that control the Atheros SoC peripherals
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#
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ARGE_DEBUG opt_arge.h
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ARGE_MDIO opt_arge.h
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#
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# At least one of the AR71XX ubiquiti boards has a Redboot configuration
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# that "lies" about the amount of RAM it has. Until a cleaner method is
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# defined, this option will suffice in overriding what Redboot says.
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#
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AR71XX_REALMEM opt_ar71xx.h
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AR71XX_ENV_UBOOT opt_ar71xx.h
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AR71XX_ENV_REDBOOT opt_ar71xx.h
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AR71XX_ATH_EEPROM opt_ar71xx.h
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#
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# Options that control the Ralink RT305xF Etherenet MAC.
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#
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IF_RT_DEBUG opt_if_rt.h
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IF_RT_PHY_SUPPORT opt_if_rt.h
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IF_RT_RING_DATA_COUNT opt_if_rt.h
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#
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# Options that affect the pmap.
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#
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PV_STATS opt_pmap.h
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