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freebsd/sys/arm/xscale/ixp425
Andrew Thompson 54873b4cd6 Add a GPIO driver for the Gateworks Cambria platform.
The external gpio pins are connected to a PLD on the i2c bus, unfortunatley
this device does not conform by failing to send an ack after each byte written.
The iicbb driver will abort the transfer when the address is not ack'd and it
would introduce a lot of churn to be able to pass a flag down to
iicbb_start/iicbb_write. Instead we do bad things by grabbing the iicbus but
then doing our own bit banging.
2010-11-11 20:18:33 +00:00
..
avila_ata.c Now that we have UARTs running with fast interrupt handlers the ata 2009-06-23 19:29:23 +00:00
avila_gpio.c Hook up the five gpio pins on the Avila board to the gpio framework. There are 2010-11-07 20:33:39 +00:00
avila_led.c strict kobj signatures: number of fixes for arm architecture 2009-06-11 17:05:13 +00:00
avila_machdep.c Implement a facility for dynamic per-cpu variables. 2009-06-23 22:42:39 +00:00
cambria_exp_space.c Now that we have UARTs running with fast interrupt handlers the ata 2009-06-23 19:29:23 +00:00
cambria_fled.c Pass the correct pointer to fled_cb(). 2010-03-26 18:49:43 +00:00
cambria_gpio.c Add a GPIO driver for the Gateworks Cambria platform. 2010-11-11 20:18:33 +00:00
cambria_led.c strict kobj signatures: number of fixes for arm architecture 2009-06-11 17:05:13 +00:00
files.avila Add a GPIO driver for the Gateworks Cambria platform. 2010-11-11 20:18:33 +00:00
files.ixp425 Intel XScale hwpmc(4) support. 2009-12-23 23:16:54 +00:00
if_npe.c Convert the PHY drivers to honor the mii_flags passed down and convert 2010-10-15 14:52:11 +00:00
if_npereg.h
ixdp425_pci.c No need to remove the same flag multiple times. 2009-08-23 19:54:36 +00:00
ixdp425reg.h
ixp425_a4x_io.S
ixp425_a4x_space.c
ixp425_iic.c strict kobj signatures: number of fixes for arm architecture 2009-06-11 17:05:13 +00:00
ixp425_intr.h
ixp425_mem.c
ixp425_npe.c Add workaround to get IXP435 NPE-A working: reseting NPE-A after NPE-C 2009-06-17 17:57:52 +00:00
ixp425_npereg.h remove IAL vestige for defining the max data/instruction memory size; 2009-06-17 02:55:53 +00:00
ixp425_npevar.h
ixp425_pci_asm.S
ixp425_pci_space.c
ixp425_pci.c
ixp425_qmgr.c Fix typos. 2010-11-09 10:59:09 +00:00
ixp425_qmgr.h When user_frac in the polling subsystem is low it is going to busy the 2009-05-30 15:14:44 +00:00
ixp425_space.c
ixp425_timer.c
ixp425_wdog.c
ixp425.c bus_add_child: change type of order parameter to u_int 2010-09-10 11:19:03 +00:00
ixp425reg.h Hook up the five gpio pins on the Avila board to the gpio framework. There are 2010-11-07 20:33:39 +00:00
ixp425var.h o add a bus space tag that forces a 2usec delay between r/w ops; this is 2009-06-22 22:54:13 +00:00
std.avila
std.ixp425
std.ixp435
uart_bus_ixp425.c o remove hack to write UUE+RTOIE in the uart's IER; force them with hints 2009-06-22 22:46:37 +00:00
uart_cpu_ixp425.c