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dependencies. A 'struct pmc_classdep' structure describes operations on PMCs; 'struct pmc_mdep' contains one or more 'struct pmc_classdep' structures depending on the CPU in question. Inside PMC class dependent code, row indices are relative to the PMCs supported by the PMC class; MI code in "hwpmc_mod.c" translates global row indices before invoking class dependent operations. - Augment the OP_GETCPUINFO request with the number of PMCs present in a PMC class. - Move code common to Intel CPUs to file "hwpmc_intel.c". - Move TSC handling to file "hwpmc_tsc.c".
74 lines
2.4 KiB
C
74 lines
2.4 KiB
C
/*-
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* Copyright (c) 2005, Joseph Koshy
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/* Machine dependent interfaces */
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#ifndef _DEV_HWPMC_PENTIUM_H_
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#define _DEV_HWPMC_PENTIUM_H_ 1
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/* Intel Pentium PMCs */
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#define PENTIUM_NPMCS 2
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#define PENTIUM_CESR_PC1 (1 << 25)
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#define PENTIUM_CESR_CC1_MASK 0x01C00000
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#define PENTIUM_CESR_TO_CC1(C) (((C) & 0x07) << 22)
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#define PENTIUM_CESR_ES1_MASK 0x003F0000
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#define PENTIUM_CESR_TO_ES1(E) (((E) & 0x3F) << 16)
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#define PENTIUM_CESR_PC0 (1 << 9)
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#define PENTIUM_CESR_CC0_MASK 0x000001C0
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#define PENTIUM_CESR_TO_CC0(C) (((C) & 0x07) << 6)
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#define PENTIUM_CESR_ES0_MASK 0x0000003F
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#define PENTIUM_CESR_TO_ES0(E) ((E) & 0x3F)
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#define PENTIUM_CESR_RESERVED 0xFC00FC00
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#define PENTIUM_MSR_CESR 0x11
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#define PENTIUM_MSR_CTR0 0x12
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#define PENTIUM_MSR_CTR1 0x13
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struct pmc_md_pentium_op_pmcallocate {
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uint32_t pm_pentium_config;
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};
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#ifdef _KERNEL
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/* MD extension for 'struct pmc' */
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struct pmc_md_pentium_pmc {
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uint32_t pm_pentium_cesr;
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};
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/*
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* Prototypes
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*/
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int pmc_p5_initialize(struct pmc_mdep *_md, int _ncpus);
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void pmc_p5_finalize(struct pmc_mdep *_md);
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#endif /* _KERNEL */
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#endif /* _DEV_HWPMC_PENTIUM_H_ */
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