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219d14fe5f
Executive is a library that can be used by standalone applications and kernels to abstract access to Octeon SoC and board-specific hardware and facilities. The FreeBSD port to Octeon will be updated to use this where possible.
114 lines
3.2 KiB
C
114 lines
3.2 KiB
C
/***********************license start***************
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* Copyright (c) 2003-2008 Cavium Networks (support@cavium.com). All rights
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* reserved.
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*
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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*
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* * Neither the name of Cavium Networks nor the names of
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* its contributors may be used to endorse or promote products
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* derived from this software without specific prior written
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* permission.
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*
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS
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* OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH
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* RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY
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* REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT
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* DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES
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* OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR
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* PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET
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* POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT
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* OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
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*
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*
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* For any questions regarding licensing please contact marketing@caviumnetworks.com
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*
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***********************license end**************************************/
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/**
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* @file
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*
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* Interface to the on chip key memory. Key memory is
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* 8k on chip that is inaccessible from off chip. It can
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* also be cleared using an external hardware pin.
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*
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* <hr>$Revision: 41586 $<hr>
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*
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*/
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#ifndef __CVMX_KEY_H__
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#define __CVMX_KEY_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CVMX_KEY_MEM_SIZE 8192 /* Size in bytes */
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/**
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* Read from KEY memory
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*
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* @param address Address (byte) in key memory to read
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* 0 <= address < CVMX_KEY_MEM_SIZE
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* @return Value from key memory
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*/
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static inline uint64_t cvmx_key_read(uint64_t address)
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{
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cvmx_addr_t ptr;
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ptr.u64 = 0;
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ptr.sio.mem_region = CVMX_IO_SEG;
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ptr.sio.is_io = 1;
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ptr.sio.did = CVMX_OCT_DID_KEY_RW;
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ptr.sio.offset = address;
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return cvmx_read_csr(ptr.u64);
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}
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/**
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* Write to KEY memory
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*
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* @param address Address (byte) in key memory to write
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* 0 <= address < CVMX_KEY_MEM_SIZE
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* @param value Value to write to key memory
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*/
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static inline void cvmx_key_write(uint64_t address, uint64_t value)
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{
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cvmx_addr_t ptr;
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ptr.u64 = 0;
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ptr.sio.mem_region = CVMX_IO_SEG;
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ptr.sio.is_io = 1;
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ptr.sio.did = CVMX_OCT_DID_KEY_RW;
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ptr.sio.offset = address;
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cvmx_write_io(ptr.u64, value);
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}
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/* CSR typedefs have been moved to cvmx-csr-*.h */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CVMX_KEY_H__ */
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