Andrew Gallatin 72f21cf2c5 A quick fix to get around a problem (described below) with cia based ... machines. The patch uses an existing global variable in place of the newbus accessor to get at use_bwx. This is a quick fix to get miatas booting again; somebody with more newbus skills than I can muster will have to correct it. Matt Jacob's description of the problem from the -alpha list: The IVAR accessor stuff for pcib is incompletely specified for CIA. There's only one accessor defined, and that's to get the BUS instance number. <..> The device methods that try and get at the use_bwx get overriden because there's only one ivar for CIA's pcib, and that's for hose #, and it's always zero.		2000-09-02 01:05:37 +00:00
..
alphapci_if.m	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
apecs_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
apecs.c	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
apecsreg.h	Add $FreeBSD$	2000-05-01 20:32:07 +00:00
apecsvar.h	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
bwx.c	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
cia_pci.c	A quick fix to get around a problem (described below) with cia based	2000-09-02 01:05:37 +00:00
cia.c	A quick fix to get around a problem (described below) with cia based	2000-09-02 01:05:37 +00:00
ciareg.h	$Id$ -> $FreeBSD$	1999-08-28 01:08:13 +00:00
ciavar.h	$Id$ -> $FreeBSD$	1999-08-28 01:08:13 +00:00
irongate_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
irongate.c	fix a typo introduced by Doug's busspace changes that causes UP1000s to	2000-08-31 16:11:20 +00:00
irongatereg.h	Add support for the Alpha Processor, Inc. UP1000 system.	2000-06-19 21:15:45 +00:00
irongatevar.h	Add support for the Alpha Processor, Inc. UP1000 system.	2000-06-19 21:15:45 +00:00
lca_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
lca.c	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
lcareg.h	Add $FreeBSD$	2000-05-01 20:32:07 +00:00
lcavar.h	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
pci_eb64plus_intr.s	Add $FreeBSD$	2000-05-01 20:32:07 +00:00
pci_eb164_intr.s	Add $FreeBSD$	2000-05-01 20:32:07 +00:00
pcibus.c	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
pcibus.h	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
swiz.c	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
t2_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
t2.c	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
t2reg.h	Add AlphaServer 2000 (demi-sable), 2100 (sable), and 2100A (lynx) support.	2000-05-28 02:52:54 +00:00
t2var.h	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
tsunami_pci.c	Introduce explicit break statements in the various chipsets'	2000-08-31 16:19:27 +00:00
tsunami.c	* Completely rewrite the alpha busspace to hide the implementation from	2000-08-28 21:48:13 +00:00
tsunamireg.h	$Id$ -> $FreeBSD$	1999-08-28 01:08:13 +00:00
tsunamivar.h	allow pci_ioctl to work with multi-hose alphas.	1999-10-12 22:10:53 +00:00